參數(shù)資料
型號: ICS1527G-60LFTR
元件分類: 時鐘及定時
英文描述: PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封裝: 4.40 MM, 0.65 MM PITCH, LEAD FREE, TSSOP-16
文件頁數(shù): 5/11頁
文件大?。?/td> 620K
代理商: ICS1527G-60LFTR
MDS1527 E
3
Revision 060204
Integrated Circuit Systems, 525 Race Street, San Jose, CA 95126, tel (408) 297-1201
www.icst.com
Section 1 Overview
ICS1527 Data Sheet
1.4 I2C Bus Serial Interface
The ICS1527 uses a 5 volt tolerant, industry-standard
I2C-bus serial interface that runs at either low-speed
(100 kHz) or high-speed (400 kHz). The interface uses
12 word addresses for control and status: one
write-only, eight read/write, and three read-only
addresses.
Two ICS1527 devices can sit on the same I2C bus,
each selected by the Master according to the state of
the I2CADR pin. The 7 bit device address is 0100110
(binary) when I2CADR is low. The device address is
0100111 (binary) when I2CADR is high. See Section 4,
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