參數(shù)資料
型號(hào): ICS1893Y-10
英文描述: 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM
中文描述: 3.3 10BASE-T/100BASE-TX快速以太網(wǎng)集成PHYceiverTM
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 170K
代理商: ICS1893Y-10
Integrated
Circuit
Systems, Inc.
ICS1893AF
Product Brief
3.3V 10Base-T/100Base-TX Integrated PHYceiver
Page 1
Document Revision: 5 April 2002
General
The ICS1893AF is a lower cost, re-packaged version of
the ICS1893Y-10. The ICS1893AF is a fully integrated,
Physical Layer device (PHY) that is compliant with both
the 10Base-T and 100Base-TX CSMA/CD Ethernet
Standard, ISO/IEC 8802-3. The ICS1893AF uses the
same proven silicon as the ICS1893Y-10 but offers a
lower cost solution by using a lower cost 300mil 48-lead
SSOP package.
All parametric specifications and timing diagrams for the
ICS1893Y-10 apply to the ICS1893AF. Refer to the
1893 Data Sheet for detailed specifications and timings.
The ICS1893AF uses the same twisted-pair transmit and
receive circuits as the ICS1893Y-10, and the same
recommended board layout techniques apply to the
ICS1893AF.
The ICS1893AF is intended for Node applications using
the standard MII interface to the MAC.
All changes are listed in the ICS1893AF / ICS1893Y-10
Feature Set Comparison Table on page 2.
ICS1893AF Features
Single 3.3V power supply
Supports category 5 cables with attenuation in excess
of 24dB at 100 MHz across a temperature range from -
5o to +85o C.
DSP-based baseline wander correction to virtually
eliminate killer packets across temperature range of
-5o to +85o C.
Low-power, 0.35-micron CMOS (typically 400mW)
Single-chip, fully integrated PHY provides PCS, PMA,
PMD and AUTONEG Sublayers of the IEEE Std.
10Base-T and 100Base-TX IEEE 8802-3 compliant
Clock or crystal supported.
Media Independent Interface (MII) supported.
Managed or Unmanaged Applications
10M or 100M Half and Full Duplex Modes
Auto-Negotiation with Next Page. Parallel detection
for Legacy products.
Fully-integrated, DSP-based PMD includes:
- Adaptive equalization and baseline wander correction
- Transmit wave shaping and stream cipher scrambler
- MLT-3 encoder and NRZ/NRZI encoder
Highly configurable supports:
- Node applications, managed or unmanaged
- 10M or 100M half and full duplex modes
Loopback mode for Diagnostic Functions
Small footprint 48-lead 300mil SSOP package.
ICS1893 Block Diagram
MII
Management
Interface
10/100 MII
MAC
Interface
Twisted Pair
Interface to
Magnetics
Modules &
RJ45
Connector
100Base-TX
Interface
Mux
MII
Extended
Register
Set
Integrated
Switch
10Base-T
PCS
Framer
CRS/COL Detection
Parallel to Serial
4B/5B
TP_PMD
MLT-3
Stream Cipher
Adaptive Equalizer
Base Line Wander
Correction
PMA
Clock Recovery
Link Monitor
Signal Detection
Error Detection
Low
Jitter
Clock
Synthesizer
Auto-
Negotiation
Configuration
and
Status
Power
LEDs &
PHY Address
Clock
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ICS1893Y-10LFT 功能描述:PHYCEIVER LOW PWR 3.3V 64-TQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器,接收器,收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:250 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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