參數(shù)資料
型號(hào): ICS308
英文描述: SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER
中文描述: 串行可編程四鎖相環(huán)VERSACLOCK合成器
文件頁數(shù): 1/8頁
文件大?。?/td> 134K
代理商: ICS308
ICS308
MDS 308 F
1
Revision 090704
Integrated Circuit Systems
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
S
ERIAL
P
ROGRAMMABLE
Q
UAD
PLL V
ERSA
C
LOCK
S
YNTHESIZER
Description
The ICS308 is a versatile serially programmable, quad
PLL clock source. The ICS308 can generate any
frequency from 250 kHz to 200 MHz, and up to 6
different output frequencies simultaneously. The
outputs can be reprogrammed on the fly, and will lock to
a new frequency in 10 ms or less. Smooth transitions
(in which the clock duty cycle remains roughly 50%) are
guaranteed if the output divider is not changed.
The device includes a PDTS pin which tri-states the
output clocks and powers down the entire chip.
The ICS308 default for non-programmed start-up are
buffered reference clock outputs on all clock output
pins.
Features
Packaged in 20-pin SSOP (QSOP)
Operating voltage of 3.3 V
Highly accurate frequency generation
M/N Multiplier PLL: M = 1..2048, N = 1..1024
Serially programmable: user determines the output
frequency via a 3-wire interface
Eliminates need for custom quartz oscillators
Input crystal frequency of 5 - 27 MHz
Optional programmable on-chip crystal capacitors
Output clock frequencies up to 200 MHz
Reference clock output
Power down tri-state mode
Very low jitter
Block Diagram
Crystal
Oscillator
GND
2
3
VDD
PDTS
PLL2
PLL3
Divide
Logic
and
Output
Enable
Control
SCLK
DATA
CLK1
CLK9
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
PLL4
PLL1
X2
Crystal or
clock input
External capacitors are
required with a crystal input.
X1/ICLK
STROBE
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