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參數(shù)資料
| 型號： | ICS525RI-11LF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PECL CLK USER CONFIG 28-SSOP |
| 標準包裝： | 48 |
| 類型： | 時鐘發(fā)生器，扇出配送 |
| PLL： | 帶旁路 |
| 輸入： | 時鐘，晶體 |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 35MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-QSOP |
| 包裝： | 管件 |
| 其它名稱： | 525RI-11LF |
DATASHEET
USER CONFIGURABLE CLOCK
ICS525-01/02/11/12
IDT USER CONFIGURABLE CLOCK
1
ICS525-01/02/11/12 REV T 053012
Description
The ICS525-01/02/11/12 are the most flexible way to
generate a high-quality, high-accuracy, high-frequency
clock output from an inexpensive crystal or clock input.
The user can configure the device to produce nearly
any output frequency from any input frequency by
grounding or floating the select pins. Neither
microcontroller, software, nor device programmer are
needed to set the frequency. Using Phase-Locked Loop
(PLL) techniques, the device accepts a standard
fundamental mode, inexpensive crystal to produce
output clocks up to 250 MHz. It can also produce a
highly accurate output clock from a given input clock,
keeping them frequency locked together.
For similar capability with a serial interface, use the
ICS307. For simple multipliers to produce common
frequencies, refer to the ICS50x family of parts, which
are smaller and more cost effective.
These products are intended for clock generation. They
have low output jitter (variation in the output period), but
input to output skew and jitter are not defined nor
guaranteed. For applications which require defined
input to output timing, use the ICS527-01.
Features
Packaged as 28-pin SSOP (150 mil body)
Industrial and commercial versions available in Pb
(lead) free package
User determines the output frequency by setting all
internal dividers
Eliminates need for custom oscillators
No software needed
Online calculator determines register settings
Pull-ups on all select inputs
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Very low jitter
Duty cycle of 45/55 up to 200 MHz
Operating voltage of 3.0 V or 5.5 V
Ideal for oscillator replacement
Industrial temperature version available
For Zero Delay, refer to the ICS527
Block Diagram
VDD
GND
2
CLK
REF
Reference
Divider
Phase Comparator,
Charge Pump, and
Loop Filter
VCO
Divider
Output
Divider
9
73
R6:R0
V8:V0
S2:S0
X1/ICLK
X2
Crystal or clock
input
Optional crystal capacitors
Crystal
Oscillator
PD
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS525RI-11LFT | 功能描述:IC PECL CLK USER CONFIG 28-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| ICS525RI-11T | 功能描述:IC PECL CLK USER CONFIG 28-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ICS525RI-12 | 制造商:ICS 制造商全稱:ICS 功能描述:User Configurable Clock |
| ICS525RI-12LF | 制造商:ICS 制造商全稱:ICS 功能描述:User Configurable Clock |
| ICS525RI12LFT | 制造商:ICS 制造商全稱:ICS 功能描述:User Configurable Clock |
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