參數(shù)資料
型號: ICS552ARI-01LF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 1/11頁
文件大小: 0K
描述: IC OSC/MULT/BUFFER OCTAL 20-SSOP
產(chǎn)品培訓(xùn)模塊: Clock Distibution and Generation 1.0
標(biāo)準(zhǔn)包裝: 55
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: 時(shí)鐘,晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:8
差分 - 輸入:輸出: 無/無
頻率 - 最大: 200MHz
除法器/乘法器: 無/是
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 20-QSOP
包裝: 管件
產(chǎn)品目錄頁面: 1251 (CN2011-ZH PDF)
其它名稱: 552ARI-01LF
800-1059
800-1059-5
800-1059-ND
DATASHEET
OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS
ICS552A-01
IDT / ICS OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS 1
ICS552A-01
REV E 051310
Description
The ICS552A-01 produces 8 low-skew copies of the
multiple input clock or fundamental, parallel-mode
crystal. Unlike other clock drivers, these parts do not
require a separate oscillator for the input. Using IDT’s
patented Phase-Locked Loop (PLL) to multiply the input
frequency, it is ideal for generating and distributing
multiple high-frequency clocks. This is a single chip
used for 3 different applications:
1) ICS552A-01 (A mode) — an Oscillator mutiplier
2) ICS552A-01 (B mode) — a Dual 1:4 buffer
3) ICS552A-01 (C mode) — a 1:8 Oscillator buffer
Features (all)
Packaged as 20-pin SSOP (QSOP)
Pb-free packaging available
Operating voltages of 3.0 V to 5.5 V
Industrial temperature available
Features (specific)
ICS552A-01 (for A mode)
Contains on-chip multiplier with selections of x1,
x1.33, x2, x2.66, x3, x3.33, x4, x4.66, x5, and x6
Power-down and Tri-state modes
ICS552A-01 (for B mode)
Up to 200 MHz clock input/output at 3.3 V
Low skew of 250 ps maximum for any bank of four
Inputs can be connected together for a 1 to 8 buffer
with 250 ps skew between any outputs
Non-inverting buffer mode
Ideal for clock networks
Output Enable mode tri-states outputs
Full CMOS output swing with 25 mA output drive
capability at TTL levels
Advanced, low power, sub-micron CMOS process
ICS552A-01 (for C mode)
Use with 25 MHz crystal for networking
Use with 27 MHz crystal for MPEG
ICS552A-01 (for A and C modes)
Input frequency of 10.0 to 27.0 MHz
Provides 8 low-skew outputs (<250 ps)
Output clock duty cycle of 40/60 at 3.3 V
Block Diagram (ICS552A-01—A mode)
Crystal
Buffer/
Crystal
Oscillator
GND
VDD
PLL
Multiplier
S3:S0
CLK1
CLK8
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
4
X2
10.0 to 27.0 MHz
crystal or clock input
External capacitors are
required with a crystal input.
X1
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