參數(shù)資料
型號(hào): ICS552R-01T
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: LOW SKEW CLOCK DRIVER, PDSO20
封裝: 0.150 INCH, SSOP-20
文件頁(yè)數(shù): 5/10頁(yè)
文件大小: 184K
代理商: ICS552R-01T
Oscillator, Multiplier, and Buffer with 8 Outputs
MDS 552-01 E
4
Revision 111705
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS552-01
Pin Descriptions (ICS552-01—B mode)
KEY: CI = clock input with pull-up resistor; I = input with internal pull-up resistor.
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
INA
CI
Input to buffer A. Outputs QA1:4 will be the same frequency. Internal pull-up resistor.
2
DC
Do not connect.
3
DC
Do not connect.
4
VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
5VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
6
GND
Power
Connect to ground.
7
QA1
Output
Output 1 from buffer A.
8
QA2
Output
Output 2 from buffer A.
9
QA3
Output
Output 3 from buffer A.
10
QA4
Output
Output 4 from buffer A.
11
S1
I
Mode Select pin 1. Selects mode for outputs. Must be at GND for all clocks on. Internal
pull-up resistor.
12
QB1
Output
Output 1 from buffer B.
13
QB2
Output
Output 2 from buffer B.
14
GND
Power
Connect to ground.
15
VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
16
VDD
Power
Connect to +3.3 V or 5.0 V. Must be same as other VDDs.
17
QB3
Output
Output 3 from buffer B.
18
QB4
Output
Output 4 from buffer B.
19
INB
CI
Input to buffer B. Outputs QA1:4 will be the same frequency. Internal pull-up resistor.
20
S0
I
Mode Select pin 0. Selects mode for outputs. Must be at GND for all clocks on. Internal
pull-up resistor.
相關(guān)PDF資料
PDF描述
ICS552R-01 LOW SKEW CLOCK DRIVER, PDSO20
ICS552R-01T LOW SKEW CLOCK DRIVER, PDSO20
ICS552R-01I LOW SKEW CLOCK DRIVER, PDSO20
ICS552R-01IT LOW SKEW CLOCK DRIVER, PDSO20
ICS554G-01AI 554 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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