參數(shù)資料
型號(hào): ICS557GI-03T
英文描述: PCI-EXPRESS CLOCK SOURCE
中文描述: 個(gè)PCI - Express時(shí)鐘源
文件頁(yè)數(shù): 7/9頁(yè)
文件大小: 225K
代理商: ICS557GI-03T
PCI-E
XPRESS
C
LOCK
S
OURCE
MDS 557-03 E
7
Revision 061005
Integrated Circuit Systems
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS557-03
AC Electrical Characteristics - CLK0/CLK1, CLK0/CLK1
Unless stated otherwise,
VDD=3.3 V ±10%
, Ambient Temperature -40 to +85
°
C
Note 1: Test setup is R
L
=50 ohms with 2 pF, Rr = 475
(1%).
Note 2: Measurement taken from a single-ended waveform.
Note 3: Measurement taken from a differential waveform.
Note 4: Measured at the crossing point where instantaneous voltages of both CLK and CLK are equal.
Note 5: CLK pins are tri-stated when OE is low asserted. CLK is driven differential when OE is high.
Parameter
Symbol
Conditions
Min.
Typ.
25
Max.
Units
MHz
MHz
mV
mV
mV
Input Frequency
Output Frequency
Output High Voltage
1,2
Output Low Voltage
1,2
Crossing Point
Voltage
1,2
Crossing Point
Voltage
1,2,4
Jitter, Cycle-to-Cycle
1,3
Modulation Frequency
Rise Time
1,2
Fall Time
1,2
Rise/Fall Time
Variation
1,2
Skew between outputs
Duty Cycle
1,3
Output Enable Time
5
Output Disable Time
5
Stabilization Time
Spread Change Time
25
660
-150
250
200
850
V
OH
V
OL
Notes 1, 2
Notes 1, 2
Absolute, Notes 1, 2
700
0
350
550
Variation over all edges, Notes 1, 2, 4
140
mV
Notes 1, 3
Spread spectrum
From 0.175 V to 0.525 V, Notes 1, 2
From 0.525 V to 0.175 V, Notes 1, 2
Notes 1, 2
60
31.5
332
344
ps
kHz
ps
ps
ps
30
175
175
33
700
700
125
t
OR
t
OF
At VDD/2
Notes 1, 3
All outputs, Note 5
All outputs, Note 5
From power-up VDD=3.3 V
Settling period after spread change
50
55
ps
%
us
us
ms
ms
45
10
10
3.0
3.0
t
STABLE
t
SPREAD
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