參數(shù)資料
型號(hào)： ICS83058AGILF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 編、解碼器及復(fù)用、解復(fù)用
英文描述： 83058 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封裝： 4.40 X 5 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16
文件頁(yè)數(shù)： 13/15頁(yè)
文件大?。?/td> 615K
代理商： ICS83058AGILF
IDT / ICS 8:1, SINGLE-ENDED MULTIPLEXER
7
ICS83058AGI REV. B JANUARY 4, 2007
ICS83058I
8:1, SINGLE-ENDED MULTIPLEXER
ADDITIVE PHASE JITTER
Additive Phase Jitter @ 155.52MHz
(12kHz to 20MHz) = 0.19ps typical
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The device
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a
dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
meets the noise floor of what is shown, but can actually be lower.
The phase noise is dependant on the input source and
measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dB
c
/H
Z
相關(guān)PDF資料
PDF描述
ICS83058AGI 83058 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
ICS8305AG-02LF 8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS8305AG-02T 8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS8305AGILFT 8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS8305AGIT 8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS83058AGILFT 功能描述:IC CLOCK MUX 8:1 250MHZ 16-TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:74 系列:- 類(lèi)型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件
ICS83058AGIT 制造商:ICS 制造商全稱(chēng):ICS 功能描述:8:1, SINGLE-ENDED MULTIPLEXER
ICS83058I 制造商:ICS 制造商全稱(chēng):ICS 功能描述:8:1, SINGLE-ENDED MULTIPLEXER
ICS8305AG 制造商:ICS 制造商全稱(chēng):ICS 功能描述:LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
ICS8305AG-02LF 功能描述:IC CLK FANOUT BUFFER 16TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:- 標(biāo)準(zhǔn)包裝:74 系列:- 類(lèi)型:扇出緩沖器（分配） 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 輸入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 輸出:HCSL，LVDS 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:管件
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