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參數(shù)資料
| 型號： | ICS8344I |
| 英文描述： | Half-Duplex M-LVDS Transceiver 8-SOIC -40 to 85 |
| 中文描述： | 低偏移，1至24差分至的LVCMOS扇出緩沖器 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 141K |
| 代理商： | ICS8344I |
8344AY-01
www.icst.com/products/hiperclocks.html
REV. B AUGUST 6, 2001
11
ICS8344-01
L
OW
S
KEW
, 1-
TO
-24
D
IFFERENTIAL
-
TO
-LVCMOS F
ANOUT
B
UFFER
A
PPLICATION
I
NFORMATION
W
IRING
THE
D
IFFERENTIAL
I
NPUT
TO
A
CCEPT
S
INGLE
E
NDED
L
EVELS
Figure 8shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ V
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
DD
= 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
F
IGURE
8 - S
INGLE
E
NDED
S
IGNAL
D
RIVING
D
IFFERENTIAL
I
NPUT
R2
1K
V
DD
CLK_IN
+
-
R1
1K
C1
0.1uF
V_REF
相關PDF資料 |
PDF描述 |
|---|---|
| ICS8344-01 | LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS8344BYI | LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS8344BYI-T | LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS8344BYT | LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER |
| ICS8344BY-01 | Buffer/Driver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS8344I-01 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LOW SKEW, 1-TO-24 DIFFERENTIAL -TO-LVCMOS/LVTTL FANOUT BUFFER |
| ICS83840 | 制造商:ICS 制造商全稱:ICS 功能描述:DDR SDRAM MUX |
| ICS83840AH | 制造商:ICS 制造商全稱:ICS 功能描述:DDR SDRAM MUX |
| ICS83840AHLF | 制造商:ICS 制造商全稱:ICS 功能描述:DDR SDRAM MUX |
| ICS83840AHLFT | 制造商:ICS 制造商全稱:ICS 功能描述:DDR SDRAM MUX |
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