參數(shù)資料
型號(hào): ICS83940DYT
英文描述: LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER
中文描述: 低偏移,1到18的LVPECL到的LVCMOS / LVTTL扇出緩沖器
文件頁(yè)數(shù): 10/15頁(yè)
文件大小: 297K
代理商: ICS83940DYT
83940DY
www.icst.com/products/hiperclocks.html
REV. B JUNE 15, 2004
10
Integrated
Circuit
Systems, Inc.
ICS83940D
L
OW
S
KEW
, 1-
TO
-18
LVPECL-
TO
-LVCMOS / LVTTL F
ANOUT
B
UFFER
A
PPLICATION
I
NFORMATION
Figure 1shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
F
IGURE
1. S
INGLE
E
NDED
S
IGNAL
D
RIVING
D
IFFERENTIAL
I
NPUT
W
IRING
THE
D
IFFERENTIAL
I
NPUT
TO
A
CCEPT
S
INGLE
E
NDED
L
EVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
DD
= 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
VDD
R2
1K
V_REF
C1
0.1u
R1
1K
Single Ended Clock Input
PCLK
nPCLK
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