參數(shù)資料
型號(hào): ICS8402AKIT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 4/19頁(yè)
文件大?。?/td> 0K
描述: IC FREQ SYNTHESIZER 32VFQFPN
標(biāo)準(zhǔn)包裝: 2,500
系列: HiPerClockS™
類型: 頻率合成器
PLL: 帶旁路
輸入: 晶體
輸出: LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 350MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 32-VFQFPN(5x5)
包裝: 帶卷 (TR)
其它名稱: 8402AKIT
ICS8402I
350MHZ, CRYSTAL-TO-LVCMOS/LVTTL FREQUENCY SYNTHESIZER
IDT / ICS LVCMOS/LVTTL FREQUENCY SYNTHESIZER
12
ICS8402AYI REV. A OCTOBER 16, 2007
Crystal Input Interface
The ICS8402I has been characterized with 18pF parallel resonant
crystals. The capacitor values, C1 and C2, shown in Figure 3 below
were determined using a 25MHz, 18pF parallel resonant crystal
and were chosen to minimize the ppm error. The optimum C1 and
C2 values can be slightly adjusted for different board layouts.
Figure 3. Crystal Input Interface
LVCMOS to XTAL Interface
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 4. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to half
swing in order to prevent signal interference with the power rail and
to reduce noise. This configuration requires that the output
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be
done in one of two ways. First, R1 and R2 in parallel should equal
the transmission line impedance. For most 50
applications, R1
and R2 can be 100
. This can also be accomplished by removing
R1 and making R2 50
.
Figure 4. General Diagram for LVCMOS Driver to XTAL Input Interface
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
22p
C2
22p
XTAL_IN
XTAL_OUT
Ro
Rs
Zo = Ro + Rs
50
0.1f
R1
R2
VCC
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