- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360770 > ICS843031AG FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR PDF資料下載
參數(shù)資料
| 型號： | ICS843031AG |
| 英文描述： | FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR |
| 中文描述： | FEMTOCLOCKS⑩晶體至3.3V的LVPECL時(shí)鐘發(fā)生器 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 211K |
| 代理商： | ICS843031AG |
843031AG
www.icst.com/products/hiperclocks.html
REV. A NOVEMBER 29, 2004
6
Integrated
Circuit
Systems, Inc.
ICS843031
F
EMTO
C
LOCKS
C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
PRELIMINARY
A
PPLICATION
I
NFORMATION
Figure 1. C
RYSTAL
I
NPU
t I
NTERFACE
C
RYSTAL
I
NPUT
I
NTERFACE
The ICS843031 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 1 below were determined using a 26.04167MHz, 18pF
parallel resonant crystal and were chosen to minimize the ppm
error. The optimum C1 and C2 values can be slightly adjusted
for different board layouts.
X1
18pF Parallel Crystal
C1
12p
XTAL_OUT
XTAL_IN
C2
12p
T
ERMINATION
FOR
3.3V LVPECL O
UTPUT
The clock layout topology shown below is a typical termination
for LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
F
IGURE
2B. LVPECL O
UTPUT
T
ERMINATION
F
IGURE
2A. LVPECL O
UTPUT
T
ERMINATION
drive 50
transmission lines.Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion. Figures 2A and 2Bshow two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
V
CC
- 2V
50
50
RTT
Z
o
= 50
Z
o
= 50
FOUT
FIN
RTT =
Z
o
1
((V
OH
+ V
OL
) / (V
CC
– 2)) – 2
3.3V
125
125
84
84
Z
o
= 50
Z
o
= 50
FOUT
FIN
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS843031AGT | CABLE ASSEMBLY; BANANA PLUG TO BANANA PLUG; 50 OHM, RG316/U COAX; 72" CABLE LENGTH |
| ICS843034-01 | FEMTOCLOCKS⑩ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
| ICS843034AY-01LF | FEMTOCLOCKS⑩ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
| ICS843034AY-01LFT | FEMTOCLOCKS⑩ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
| ICS843034AY-01T | FEMTOCLOCKS⑩ MULTI-RATE LVPECL FREQUENCY SYNTHESIZER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS843031AG-01 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO- 3.3V, 2.5V LVPECL CLOCK GENERATOR |
| ICS843031AG-01LF | 功能描述:IC CLK GENERATOR LVPECL 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS843031AG-01LFT | 功能描述:IC CLK GENERATOR LVPECL 8-TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS843031AG-01T | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FEMTOCLOCKS⑩ CRYSTAL-TO- 3.3V, 2.5V LVPECL CLOCK GENERATOR |
| ICS843031AGI-01 | 功能描述:IC CLK GENERATOR LVPECL 8-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。