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FEMTOCLOCKS MULTI-RATE 3.3V, 2.5V
LFPECL FREQUENCY SYNTHESIZER
ICS843034
IDT / ICS 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
1
ICS843034AY REV B JULY 18, 2006
PRELIMINARY
GENERAL DESCRIPTION
The ICS843034 is a general purpose, low phase
noise LVPECL synthesizer which can generate
frequencies for a wide variety of applications. The
ICS843034 has a 4:1 input Multiplexer from which
the following inputs can be selected: 1 differential
input, 1 single-ended input, or two cr ystal
oscillators, thus making the device ideal for frequency
translation or frequency generation. Each differential LVPECL
output pair has an output divider which can be independently
set so that two different frequencies can be generated.
Additionally, each LVPECL output pair has a dedicated power
supply pin so the outputs can r un at 3.3V or 2.5V. The
ICS843034-02 also supplies a buffered copy of the reference
clock or crystal frequency on the single-ended REF_CLK pin
which can be enabled or disabled (disabled by default). The
output frequency can be programmed using either a serial or
parallel programming interface.
The phase jitter of the ICS843034 is less than 1ps rms, making
it suitable for use in Fibre Channel, SONET, and Ethernet
applications.
Example applications include systems which must support both
FEC and non FEC rates. In 10Gb Fibre Channel, for example,
you can use a 25.5MHz crystal to generate a 159.375MHz
reference clock, and then switch to a 20.544MHz crystal to
generate 164.355MHz for 66/64 FEC. Other applications could
include suppor ting both Ethernet frequencies and SONET
frequencies in an application. When Ethernet frequencies are
needed, a 25MHz crystal can be used and when SONET
frequencies are needed, the input MUX can be switched to
select a 38.88MHz crystal.
FEATURES
Dual differential 3.3V LVPECL outputs which can be set
independently for either 3.3V or 2.5V
4:1 Input Mux:
One differential input
One single-ended input
Two crystal oscillator interfaces
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
TEST_CLK accepts LVCMOS or LVTTL input levels
Output frequency range: 35MHz to 750MHz
Crystal input frequency range: 12MHz to 40MHz
VCO range: 560MHz to 750MHz
Parallel or serial interface for programming feedback divider
and output dividers
RMS phase jitter at 333.33MHz, using a 22.222MHz crystal
(12kHz to 20MHz): 0.80ps (typical)
Supply voltage modes:
LVPECL outputs (core/outputs):
3.3V/3.3V
3.3V/2.5V
REF_CLK output (core/outputs):
3.3V/3.3V
0°C to 70°C ambient operating temperature
Industrial temperature available upon request
Available in both standard and lead-free RoHS-compliant
packages
HiPerClockS
ICS
PIN ASSIGNMENT
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
M8
NB0
NB1
NB2
OE_REF
OE_A
OE_B
VCC
NA0
NA1
NA2
VEE
XTAL_OUT1
XTAL_IN1
XTAL_OUT0
XTAL_IN0
TEST_CLK
SEL1
SEL0
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
CLK
nCLK
nP_LO
A
D
VCO_SEL
M0
M1
M2
M3
M4
M5
M6
M7
ICS843034
48-Pin LQFP
7mm x 7mm x 1.4mm
package body
Y Package
Top View
V
EE
nc
V
CCO
_
REF
REF_CLK
V
CCO
_
B
nFOUTB0
FOUTB0
V
CCO
_
A
nFOUT
A0
FOUT
A
0
V
CC
TEST
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.