- 您現在的位置：買賣IC網 > PDF目錄8980 > ICS8430AY-62LFT (IDT, Integrated Device Technology Inc)IC SYNTHESIZER LVPECL 32-LQFP PDF資料下載
參數資料
| 型號： | ICS8430AY-62LFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數： | 17/23頁 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER LVPECL 32-LQFP |
| 標準包裝： | 1,000 |
| 系列： | HiPerClockS™ |
| 類型： | 頻率合成器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，LVTTL，晶體 |
| 輸出： | LVPECL |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 500MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應商設備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 8430AY-62LFT |
ICS8430-62 Datasheet
500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS8430AY-62 REVISION A JULY 2, 2009
3
2009 Integrated Device Technology, Inc.
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number
Name
Type
Description
1, 2, 28, 29,
30, 31, 32
M5, M6, M0, M1,
M2, M3, M4
Input
Pulldown
M divider inputs. Data latched on LOW-to-HIGH transition of nP_LOAD input.
LVCMOS/LVTTL interface levels.
3, 4
M7, M8
Input
Pullup
5, 7
N0, N2
Input
Pulldown
Determines output divider value as defined in Table 3C, Function Table.
LVCMOS/LVTTL interface levels.
6
N1
Input
Pullup
8, 16
VEE
Power
Negative supply pins.
9
TEST
Output
Test output which is ACTIVE in the serial mode of operation.
Output driven LOW in parallel mode. LVCMOS/LVTTL interface levels.
10
VCC
Power
Core supply pin.
11, 12
FOUT1, nFOUT1
Output
Differential output pair for the synthesizer. LVPECL interface levels.
13
VCCO
Power
Output supply pin for LVPECL outputs.
14, 15
FOUT0, nFOUT0
Output
Differential output pair for the synthesizer. LVPECL interface levels.
17
MR
Input
Pulldown
Active High Master Reset. When logic HIGH, the internal dividers are reset
causing the true outputs FOUTx to go low and the inverted outputs nFOUTx to
go high. When Logic LOW, the internal dividers and the outputs are enabled.
Assertion of MR does not affect loaded M, N, and T values.
LVCMOS/LVTTL interface levels.
18
S_CLOCK
Input
Pulldown
Clocks in serial data present at S_DATA input into the shift register on the
rising edge of S_CLOCK. LVCMOS/LVTTL interface levels.
19
S_DATA
Input
Pulldown
Shift register serial input. Data sampled on the rising edge of S_CLOCK.
LVCMOS/LVTTL interface levels.
20
S_LOAD
Input
Pulldown
Controls transition of data from shift register into the dividers.
LVCMOS/LVTTL interface levels.
21
VCCA
Power
Analog supply pin.
22
XTAL_SEL
Input
Pullup
Selects between crystal oscillator or REF_CLK inputs as the PLL reference
source. Selects XTAL inputs when HIGH. Selects REF_CLK when LOW.
LVCMOS/LVTTL interface levels.
23
REF_CLK
Input
Pulldown
Single-ended reference clock input. LVCMOS/LVTTL interface levels.
24,
25
XTAL_OUT
XTAL_IN
Input
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
26
nP_LOAD
Input
Pulldown
Parallel load input. Determines when data present at M8:M0 is loaded into M
divider, and when data present at N2:N0 sets the N output divider value.
LVCMOS/LVTTL interface levels.
27
VCO_SEL
Input
Pullup
Determines whether synthesizer is in PLL or bypass mode. When LOW,
synthesizer is in bypass mode, when HIGH,synthesizer is in PLL mode.
LVCMOS/LVTTL interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
4
pF
RPULLUP
Input Pullup Resistor
51
k
RPULLDOWN
Input Pulldown Resistor
51
k
相關PDF資料 |
PDF描述 |
|---|---|
| VI-B0Y-MY-F2 | CONVERTER MOD DC/DC 3.3V 33W |
| VI-B0Y-MY-F1 | CONVERTER MOD DC/DC 3.3V 33W |
| VE-2ND-MW-F2 | CONVERTER MOD DC/DC 85V 100W |
| VE-2ND-MW-F1 | CONVERTER MOD DC/DC 85V 100W |
| MS3454L20-14S | CONN RCPT 5POS JAM NUT W/SCKT |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ICS8430AYI-61 | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8430AYI-61LF | 功能描述:IC SYNTHESIZER LVPECL 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| ICS8430AYI-61LFT | 功能描述:IC SYNTHESIZER LVPECL 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:* 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8430AYI-61T | 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS8430BI-71L | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
發(fā)布緊急采購，3分鐘左右您將得到回復。