500MH
參數(shù)資料
型號(hào): ICS8430AYI-61LFT
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 3/20頁(yè)
文件大?。?/td> 0K
描述: IC SYNTHESIZER LVPECL 32-LQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
其它名稱: 800-2587-6
8430AYI-61
www.icst.com/products/hiperclocks.html
REV. C JUNE 2, 2006
11
Integrated
Circuit
Systems, Inc.
ICS8430I-61
500MHZ, CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
designed to drive 50
Ω transmission lines. Matched imped-
FIGURE 5B. LVPECL OUTPUT TERMINATION
FIGURE 5A. LVPECL OUTPUT TERMINATION
ance techniques should be used to maximize operating
frequency and minimize signal distortion. There are a few
simple termination schemes. Figures 5A and 5B show two
different layouts which are recommended only as guide-
lines. Other suitable clock layouts may exist and it would be
recommended that the board designers simulate to guar-
antee compatibility across all printed circuit and clock com-
ponent process variations.
TERMINATION FOR 3.3V LVPECL OUTPUTS
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參數(shù)描述
ICS8430AYI-61T 制造商:ICS 制造商全稱:ICS 功能描述:500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS8430BI-71L 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8430BY-71 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8430BY71L 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
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