IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY SYNTHESIZER
9
ICS8430B-71 REV A NOVEMBER 20, 2006
ICS8430B-71
700MHZ, CRYSTAL INTERFACE/LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in
Figure 3. The XTAL_OUT pin can be left floating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it is
recommended that the amplitude be reduced from full swing to
half swing in order to prevent signal interference with the power
rail and to reduce noise. This configuration requires that the output
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be
done in one of two ways. First, R1 and R2 in parallel should equal
the transmission line impedance. For most 50
applications, R1
and R2 can be 100
. This can also be accomplished by removing
R1 and making R2 50
.
R2
Zo = 50
VDD
Ro
Zo = Ro + Rs
R1
VDD
XTAL_IN
XTAL_OUT
.1uf
Rs
FIGURE 2. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
A crystal can be characterized for either series or parallel mode
operation. The ICS8430B-71 has a built-in crystal oscillator circuit.
This interface can accept either a series or parallel crystal without
additional components and generate frequencies with accuracy
suitable for most applications. Additional accuracy can be achieved
by adding two small capacitors C1 and C2 as shown in
Figure 2.
18p
X1
18pF Parallel Crystal
C2
22p
XTAL_OUT
XTAL_IN