參數(shù)資料
型號: ICS84329AYLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 700 MHz, OTHER CLOCK GENERATOR, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
文件頁數(shù): 4/19頁
文件大?。?/td> 279K
代理商: ICS84329AYLFT
84329AV
www.icst.com/products/hiperclocks.html
REV. D DECEMBER 15, 2004
12
Integrated
Circuit
Systems, Inc.
ICS84329
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
FIGURE 6B. PCB BOARD LAYOUT FOR ICS84329
The following component footprints are used in this layout
example:
All the resistors and capacitors are size 0603.
POWER AND GROUNDING
Place the decoupling capacitors C1, C2 and C3, as close as
possible to the power pins. If space allows, placement of the
decoupling capacitor on the component side is preferred. This
can reduce unwanted inductance between the decoupling
capacitor and the power pin caused by the via.
Maximize the power and ground pad sizes and number of vias
capacitors. This can reduce the inductance between the power
and ground planes and the component power and ground pins.
The RC filter consisting of R7, C11, and C16 should be placed
as close to the V
CCA pin as possible.
CLOCK TRACES AND TERMINATION
Poor signal integrity can degrade the system performance or
cause system failure. In synchronous high-speed digital systems,
the clock signal is less tolerant to poor signal integrity than other
signals. Any ringing on the rising or falling edge or excessive ring
back can cause system failure. The shape of the trace and the
trace delay might be restricted by the available space on the board
and the component location. While routing the traces, the clock
signal traces should be routed first and should be locked prior to
routing other signal traces.
The differential 50
output traces should have the
same length.
Avoid sharp angles on the clock trace. Sharp angle
turns cause the characteristic impedance to change on
the transmission lines.
Keep the clock traces on the same layer. Whenever pos-
sible, avoid placing vias on the clock traces. Placement
of vias on the traces can affect the trace characteristic
impedance and hence degrade signal integrity.
To prevent cross talk, avoid routing other signal traces in
parallel with the clock traces. If running parallel traces is
unavoidable, allow a separation of at least three trace
widths between the differential clock trace and the other
signal trace.
Make sure no other signal traces are routed between the
clock trace pair.
The matching termination resistors should be located as
close to the receiver input pins as possible.
CRYSTAL
The crystal X1 should be located as close as possible to the pins
4 (XTAL_IN) and 5 (XTAL_IN). The trace length between the X1
and U1 should be kept to a minimum to avoid unwanted parasitic
inductance and capacitance. Other signal traces should not be
routed near the crystal traces.
C16
X1
C2
VCC
PIN 2
C11
C1
GND
VIA
50 Ohm
Traces
R7
VCCA
Signals
Traces
U1
PIN 1
VCCA
相關(guān)PDF資料
PDF描述
ICS84329BV-01T 700 MHz, OTHER CLOCK GENERATOR, PQCC28
ICS84329BM-01 700 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS84329BM-01T 700 MHz, OTHER CLOCK GENERATOR, PDSO28
ICS84329BV-01 700 MHz, OTHER CLOCK GENERATOR, PQCC28
ICS84329BM-01LF 700 MHz, OTHER CLOCK GENERATOR, PDSO28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS84329AYT 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS84329B 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS84329BM-01 制造商:Integrated Device Technology Inc 功能描述:IC SYNTHESIZER 700MHZ 28-SOIC
ICS84329BM-01LF 功能描述:IC SYNTHESIZER 700MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器,扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP(8x8) 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT
ICS84329BM-01LFT 功能描述:IC SYNTHESIZER 700MHZ 28-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:HiPerClockS™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器,扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP(8x8) 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT