參數(shù)資料
型號(hào): ICS84329AYT
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 700 MHz, OTHER CLOCK GENERATOR, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
文件頁數(shù): 6/19頁
文件大?。?/td> 279K
代理商: ICS84329AYT
84329AV
www.icst.com/products/hiperclocks.html
REV. D DECEMBER 15, 2004
14
Integrated
Circuit
Systems, Inc.
ICS84329
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in the
Figure 7.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 1.0V
(V
CC_MAX
- V
OH_MAX
) = 1.0V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
(V
CC_MAX
- V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
[(2V - 1V)/50
] * 1V = 20.0mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50
] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
FIGURE 7. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CC
RL
50
V
CC - 2V
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參數(shù)描述
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