參數(shù)資料
型號(hào): ICS84329BM-01LF
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 700 MHz, OTHER CLOCK GENERATOR, PDSO28
封裝: 7.50 X 18.05 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MS-013, MO-119, SOIC-28
文件頁數(shù): 18/19頁
文件大?。?/td> 268K
代理商: ICS84329BM-01LF
84329BM-01
www.icst.com/products/hiperclocks.html
REV. A JUNE 10, 2005
8
Integrated
Circuit
Systems, Inc.
ICS84329B-01
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs.Therefore, terminat-
ing resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
FIGURE 3B. LVPECL OUTPUT TERMINATION
FIGURE 3A. LVPECL OUTPUT TERMINATION
drive 50
Ω transmission lines. Matched impedance techniques
should be used to maximize operating frequency and minimize
signal distortion.
Figures 3A and 3B show two different layouts
which are recommended only as guidelines. Other suitable clock
layouts may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
TERMINATION FOR LVPECL OUTPUTS
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS84329B-01 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC and VCCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 2 illustrates how
a 10
Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
CCA pin.
FIGURE 2. POWER SUPPLY FILTERING
10
Ω
V
CCA
10
μF
.01
μF
3.3V
.01
μF
V
CC
POWER SUPPLY FILTERING TECHNIQUES
相關(guān)PDF資料
PDF描述
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