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參數(shù)資料
| 型號： | ICS84330BVLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 700 MHz, OTHER CLOCK GENERATOR, PQCC28 |
| 封裝： | 11.60 X 11.40 MM, 4.10 MM HEIGHT, MS-018, PLASTIC, LCC-28 |
| 文件頁數(shù)： | 18/19頁 |
| 文件大小： | 247K |
| 代理商： | ICS84330BVLF |
84330BV
www.icst.com/products/hiperclocks.html
REV. C MAY 16, 2006
8
Integrated
Circuit
Systems, Inc.
ICS84330
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS84330 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC and VCCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 2 illustrates how
a 10
Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
CCA pin. The 10Ω
resistor can also be replaced by a ferrit bead.
FIGURE 2. POWER SUPPLY FILTERING
10
Ω
V
CCA
10
μF
.01
μF
3.3V
.01
μF
V
CC
POWER SUPPLY FILTERING TECHNIQUES
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept single ended LVCMOS signal
through an AC couple capacitor. A general interface diagram
is shown in Figure 3. The XTAL_OUT input can be left
floating. The edge rate can be as slow as 10ns. If the incom-
ing signal has sharp edge rate and the signal path is a long
trace, proper termination for the driver and controlled char-
Figure 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
acteristic impedance trace may be required. The input can
function with half swing amplitude. Reducing amplitude from
full swing of 3.3V to half swing of about 1.65V can prevent
signal interfere with power rail and may reduce noise. Please
refer to the LVCMOS driver data sheet and application note
for amplitude reduction and termination approach.
Cry stal Interf ace
XTAL_IN
XTAL_OUT
C1
0.1uF
LVCMOS_Driv er
3.3V
INPUTS:
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
Ω resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT PINS
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| ICS84330BY | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS84330CM-01LF | 700 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| ICS84330CVI | 720 MHz, OTHER CLOCK GENERATOR, PQCC28 |
| ICS84330CYIT | 720 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| ICS84330CY | 700 MHz, OTHER CLOCK GENERATOR, PQFP32 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS84330BVT | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS84330BY | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
| ICS84330BYLF | 功能描述:IC SYNTHESIZER 700MHZ 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS84330BYLFT | 功能描述:IC SYNTHESIZER 700MHZ 32-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS84330BYLN | 制造商:ICS 制造商全稱:ICS 功能描述:700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER |
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