參數(shù)資料
型號: ICS853011CMT
元件分類: 時鐘及定時
英文描述: 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝: 3.90 X 4.90 MM, 1.37 MM HEIGHT, MS-012, SOIC-8
文件頁數(shù): 11/15頁
文件大?。?/td> 239K
代理商: ICS853011CMT
853011CM
www.icst.com/products/hiperclocks.html
REV. A MARCH 30, 2006
5
Integrated
Circuit
Systems, Inc.
ICS853011C
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
ADDITIVE PHASE JITTER
Additive Phase Jitter @ 155.52MHz
(12kHz to 20MHz) = 0.16ps typical
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is
called the dBc Phase Noise. This value is normally expressed
using a Phase noise plot and is most often the specified plot
in many applications. Phase noise is defined as the ratio of
the noise power present in a 1Hz band at a specified offset
from the fundamental frequency to the power value of the
fundamental. This ratio is expressed in decibels (dBm) or a
As with most timing specifications, phase noise measure-
ments have issues. The primary issue relates to the limita-
tions of the equipment. Often the noise floor of the equipment
is higher than the noise floor of the device. This is illustrated
ratio of the power in the 1Hz band to the power in the funda-
mental. When the required offset is specified, the phase noise
is called a dBc value, which simply means dBm at a specified
offset from the fundamental. By investigating jitter in the fre-
quency domain, we get a better understanding of its effects
on the desired application over the entire time record of the
signal. It is mathematically possible to calculate an expected
bit error rate given a phase noise plot.
above. The device meets the noise floor of what is shown, but
can actually be lower. The phase noise is dependant on the
input source and measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dB
c/H
Z
相關PDF資料
PDF描述
ICS853011CMT 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853011CMLF 853011 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
ICS853013AMLF 853013 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS853013AMLFT 853013 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS853013AMT 853013 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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