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參數(shù)資料
| 型號： | ICS870919BRI-01LFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK GENERATOR LVCMOS 28QSOP |
| 標準包裝： | 2,500 |
| 系列： | HiPerClockS™ |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，LVTTL |
| 輸出： | LVCMOS，LVTTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:8 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 160MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-QSOP |
| 包裝： | 帶卷 (TR) |
ICS870919BVI-01 REVISION C JANUARY 6, 2012
10
2012 Integrated Device Technology, Inc.
ICS870919I-01 Data Sheet
LVCMOS CLOCK GENERATOR
Schematic Layout
Figure 1 shows an example of 870919I-01 application schematic. In
this example, the device is operated at VDD=AVDD=3.3V. As with
any high speed analog circuitry, the power supply pins are vulnerable
to random noise. To achieve optimum jitter performance, power
supply isolation is required. The 870919I-01 provides separate
power supplies to isolate any high switching noise from coupling into
the internal PLL.
In order to achieve the best possible filtering, it is recommended that
the placement of the filter components be on the device side of the
PCB as close to the power pins as possible. If space is limited, the
0.1Fcapacitor in each power pin filter should be placed on the
device side. The other components can be on the opposite side of the
PCB. Power supply filter recommendations are a general guideline
to be used for reducing external noise from coupling into the devices.
The filter performance is designed for a wide range of noise
frequencies. This low-pass filter starts to attenuate noise at
approximately 10 kHz. If a specific frequency noise component is
known, such as switching power supplies frequencies, it is
recommended that component values be adjusted and if required,
additional filtering be added. Additionally, good general design
practices for power plane voltage stability suggests adding bulk
capacitance in the local area of all devices.
The schematic example focuses on functional connections and is not
configuration specific. Refer to the pin description and functional
tables in the datasheet to ensure that the logic control inputs are
properly set.
Figure 1. 870919I-01 Application Schematic
C8
10uF
SYNC0
Set Logic
Input to
'0'
To Log ic
Inpu t
pins
Q2
R3
43
U1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
28
27
26
25
GND
nQ5
VDD
OE/nRST
FEEDBACK
REF_SEL
SYNC0
AVDD
nPE
AGND
SYNC1
FREQ_SEL
GND
Q0
VDD
Q1
GND
PLL_EN
LOCK
GND
Q2
VDD
Q3
GND
Q4
VDD
2XQ
Q/ 2
Q0
AGND
C6
0.1uF
PLL_EN
R5
39
Zo = 50
VDD
RU2
Not Install
Q3
VDD
REF_SEL
Zo = 50 Ohm
V DD= 3.3V
2XQ
nQ5
Q0
QE/nRST
C5
0.1uF
R6
0
VDD
Receiver
Zo = 50
3.3V
AVDD
Unused output can be left floating. There
should no trace attached to unused output.
Device characterized with all outputs
terminated.
R4
39
Ro ~ 7 O hm
Q1
Driver_LVCMOS
LOCK
C2
0.1uF
RD2
1K
VDD
Q/2
2XQ
C7
0.1uF
To Lo gic
Inp ut
pin s
Set Logic
Input to
'1'
muRata, BLM18BB221SN1
FB1
1
2
C4
0.1uF
VDD
Receiver
VDD
C3
0.1uF
nPE
VDD
RD1
Not I nst all
FEEDBACK
R1
1-2
R2
35
SYNC1
RU1
1K
Q1
C1
10uF
FREQ_SEL
Logic Control Input Examples
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS870919BRI-01T | 制造商:Integrated Device Technology Inc 功能描述:IC CLK GENERATOR LVCMOS 28QSOP |
| ICS870919BRILF | 功能描述:IC CLK GENERATOR LVCMOS 28QSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ICS870919BRILFT | 功能描述:IC CLK GENERATOR LVCMOS 28QSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™, FemtoClock™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS870919BVI-01LF | 功能描述:IC CLK GENERATOR LVCMOS 28PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ICS870919BVI-01LFT | 功能描述:IC CLK GENERATOR LVCMOS 28PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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