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參數(shù)資料
| 型號： | ICS9173B-15CS08LFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 0K |
| 描述： | IC PLL VIDEO GENLOCK 8SOIC |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/頻率倍增器 |
| PLL： | 是 |
| 主要目的： | 視頻同步鎖相 |
| 輸入： | 時鐘 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 37.5MHz |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
DATASHEET
VIDEO GENLOCK PLL
ICS9173B
IDT VIDEO GENLOCK PLL
1
ICS9173B
REV D 012913
Description
The ICS9173B provide the analog PLL circuit blocks to
implement a frequency multiplier. Because the device is
configured to use an external divider in the PLL clock
feedback path, a large divider can be used to result in a
large frequency multiplication ratio. This is useful when
using a low frequency input clock to generate a high
frequency output clock. The ICS9173B contains a phase
detector, charge pump, loop filter, and voltage-controlled
oscillator (VCO). The ICS674-01 can be used as the
external feedback divider.
A common application of the ICS9173B is the
implementation of a video genlock circuit. Because of this,
the ICS9173B inputs operate on the negative-going clock
edge.
The ICS9173B is pin and function compatible to the
AV9173-01/15.
Features
Phase-detector/VCO circuit block
Ideal for genlock system
Reference clock range 12 kHz to 1 MHz for full output
clock range
Output clock range of 1.25 to 75 MHz (-01), and 0.625 to
37.5 MHz (-15). See “Allowable Input Frequency to
Output Frequency” table for conditions
On-chip loop filter
Single 5 V power supply
Low power CMOS technology
8-pin SOIC package
Block Diagram
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