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參數(shù)資料
| 型號(hào)： | ICS932S200BFLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 8/13頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FREQ TIMING GENERATOR 56-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 時(shí)鐘/頻率發(fā)生器 |
| PLL： | 是 |
| 主要目的： | 服務(wù)器 |
| 輸入： | 晶體 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:20 |
| 差分 - 輸入:輸出： | 無(wú)/無(wú) |
| 頻率 - 最大： | 133MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-SSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 932S200BFLFT |
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ICS932S200
0427D—12/15/08
Power Management Requirements:
Note:
1. Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable goes
low/high to the first valid clock comes out of the device.
2. Power up latency is when PWR_DWN# goes inactive (high to when the first valid clocks are dirven from the device.
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CPU_STOP# Timing Diagram
CPU_STOP# is an asynchronous input to the clock synthesizer. It is used to turn off the CPU and 3V66 clocks for
low power operation. CPU_STOP# is asserted asynchronously by the external clock control logic with the rising edge
of free running PCI clock (and hence CPU clock) and must be internally synchronized to the external output. All other
clocks will continue to run while the CPU clocks are disabled. The CPU clocks must always be stopped in a low state
and started in such a manner as to guarantee that the high pulse width is a full pulse.
Notes:
1. All timing is referenced to the internal CPUCLK.
2. The internal label means inside the chip and is a reference only.
This in fact may not be the way that the control is designed.
3. 3V66 clocks also stop/start before
4. PD# and PCI_STOP# are shown in a high state.
5. Diagrams shown with respect to 133MHz. Similar operation when
CPU is 100MHz
CPUCLK
(internal)
(externall)
PCICLK
PCI_STOP#
CPU_STOP#
PD#
CPUCLK
3V66
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| ICS932S200BFT | 制造商:INT_CIR_SYS 功能描述: |
| ICS932S200BG | 功能描述:IC FREQ TIMING GENERATOR 56TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS932S200BGT | 功能描述:IC FREQ TIMING GENERATOR 56TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS932S200YF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for Dual Server/Workstation Systems |
| ICS932S200YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for Dual Server/Workstation Systems |
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