參數(shù)資料
型號(hào): ICS93V850
英文描述: DDR Phase Lock Loop Clock Driver
中文描述: 復(fù)員鎖相環(huán)時(shí)鐘驅(qū)動(dòng)器
文件頁(yè)數(shù): 3/9頁(yè)
文件大?。?/td> 66K
代理商: ICS93V850
3
ICS93V855
0497B—06/01/04
Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above
those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Supply Voltage: (VDD & AVDD) . . . . . . . . . . -0.5V to 3.6V
(VDDI) . . . . . . . . . . . . . . -0.5V to 4.6V
Logic Inputs: VI . . . . . . . . . . . . . . . . . . . . . . . V
SS
–0.5 V to V
DD
+0.5 V
Logic Outputs: VO. . . . . . . . . . . . . . . . . . . . . V
SS
–0.5 V to V
DD
+0.5 V
Input clamp current: IIK (VI < 0 or VI > VDD) +/- 50mA
Output clamp current: IOK (VO < 0 or VO > VDD)
Continuous output current: IO (VO = 0 to VDD) +/- 50mA
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
+/- 50mA
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
Input High Current
I
IH
V
I
= V
DD
or GND
Input Low Current
I
IL
V
I
= V
DD
or GND
I
DD2.5
C
L
= 0pf, R
L
= 120 ohms
I
DDPD
C
L
= 0pf, R
L
= 120 ohms
Output High Current
I
OH
V
DD
= 2.3V, V
OUT
= 1V
Output Low Current
I
OL
V
DD
= 2.3V, V
OUT
= 1.2V
High Impedance
Output Current
Input Clamp Voltage
V
IK
Iin = -18mA
V
DD
= min to max,
I
OH
= -1 mA
V
DD
= 2.3V,
I
OH
= -12 mA
V
DD
= min to max
I
OL
=1 mA
V
DD
= 2.3V
I
OH
=12 mA
Input Capacitance
1
C
IN
VI = V
DD
or GND
Output Capacitance
1
C
OUT
VI = V
DD
or GND
1
Guaranteed by design and characterization, not 100% tested in production.
CONDITIONS
MIN
5
TYP
MAX
UNITS
μA
μA
mA
μA
mA
mA
5
250
100
-18
26
I
OZ
V
DD
=2.7V, Vout=V
DD
or GND
±10
μ
A
V
-1.2
V
DD
- 0.1
V
1.7
V
0.1
0.6
V
3
3
pF
pF
Operating Supply
Current
High-level output voltage
V
OH
Low-level output voltage
V
OL
相關(guān)PDF資料
PDF描述
ICS93V850YGT DDR Phase Lock Loop Clock Driver
ICS93V857 2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz)
ICS93V857YG-025T 2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz)
ICS93V857YG-125T 2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz)
ICS93V857YG-130T 2.5V Wide Range Frequency Clock Driver (33MHz - 233MHz)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS93V850CG 制造商:INT_CIR_SYS 功能描述:
ICS93V850YGT 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR Phase Lock Loop Clock Driver
ICS93V855 制造商:ICS 制造商全稱(chēng):ICS 功能描述:DDR Phase Lock Loop Clock Driver
ICS93V855AG 功能描述:IC DDR PLL CLOCK DRIVER 28-TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類(lèi)型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱(chēng):93786AFT
ICS93V855AGI 功能描述:IC DDR PLL CLOCK DRIVER 28-TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類(lèi)型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
<var id="dbeyt"><pre id="dbeyt"></pre></var>
  • <var id="dbeyt"></var>
  • <var id="dbeyt"><pre id="dbeyt"></pre></var>
    <big id="dbeyt"><form id="dbeyt"></form></big>
    <i id="dbeyt"></i>