- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9584 > ICS94201DF (IDT, Integrated Device Technology Inc)IC FREQ GENERATOR PROGR 56-SSOP PDF資料下載
參數(shù)資料
| 型號： | ICS94201DF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 7/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FREQ GENERATOR PROGR 56-SSOP |
| 標準包裝： | 26 |
| 類型： | 時鐘/頻率發(fā)生器，多路復用器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務器 |
| 輸入： | 晶體 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:29 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 500.03MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-BSSOP（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 56-SSOP |
| 包裝： | 管件 |
| 其它名稱： | 94201DF |
15
ICS94201
0428B - 11/28/05
Fig. 1
Shared Pin Operation -
Input/Output Pins
The I/O pins designated by (input/output) on the ICS94201
serve as dual signal functions to the device. During initial
power-up, they act as input pins. The logic level (voltage) that
is present on these pins at this time is read and stored into a 5-
bit internal data latch. At the end of Power-On reset, (see AC
characteristics for timing values), the device changes the
mode of operations for these pins to an output function. In this
mode the pins produce the specified buffered clocks to external
loads.
To program (load) the internal configuration register for these
pins, a resistor is connected to either the VDD (logic 1) power
supply or the GND (logic 0) voltage potential. A 10 Kilohm
(10K) resistor is used to provide both the solid CMOS
programming voltage needed during the power-up
programming period and to provide an insignificant load on
the output clock during the subsequent operating period.
Via to
VDD
Clock trace to load
Series Term. Res.
Programming
Header
Via to Gnd
Device
Pad
2K
W
8.2K
W
Figure 1 shows a means of implementing this function when
a switch or 2 pin header is used. With no jumper is installed
the pin will be pulled high. With the jumper in place the pin
will be pulled low. If programmability is not necessary, than
only a single resistor is necessary. The programming resistors
should be located close to the series termination resistor to
minimize the current loop area. It is more important to locate
the series termination resistor close to the driver than the
programming resistor.
相關PDF資料 |
PDF描述 |
|---|---|
| ICS842023BGLFT | IC CLK GEN ETHERNET 25MHZ 8TSSOP |
| VI-B1F-MW-F3 | CONVERTER MOD DC/DC 72V 100W |
| MC10H116MEL | IC LINE RCVR TRIPLE ECL 16SOEIAJ |
| VE-26N-MX-F3 | CONVERTER MOD DC/DC 18.5V 75W |
| VE-B3D-MY-S | CONVERTER MOD DC/DC 85V 50W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ICS94201DFLF | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS94201DFLFT | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS94201DFT | 功能描述:IC FREQ GENERATOR PROGR 56-SSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| ICS94201YFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
| ICS94203 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Frequency Generator for PII/III⑩ |
發(fā)布緊急采購，3分鐘左右您將得到回復。