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參數(shù)資料
| 型號： | ICS952301 |
| 英文描述： | Frequency Timing Generator for Transmeta Systems |
| 中文描述： | 全美達系統(tǒng)的頻率定時發(fā)生器 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 591K |
| 代理商： | ICS952301 |
2
ICS952301
Advance Information
0673—07/09/02
Pin Descriptions
PIN # PIN
PIN
TYPE
PWR
IN
OUT
DESCRIPTION
1
2
3
GNDREF
X1
X2
Ground pin.
Crystal input, nominally 14.318MHz.
Crystal output, nominally 14.318MHz.
Asynchronous active low input pin used to power down the
device into a low power state. The internal clocks are
disabled and the VCO and the crystal are stopped. The
latency of the power down will not be greater than 3ms.
PCI clock outputs.
PCI clock outputs.
Ground pin.
Supply for PCI, nominal 3.3V.
PCI clock outputs.
PCI clock outputs.
PCI clock outputs.
Ground pin.
Supply for PCI, nominal 3.3V.
PCI clock outputs.
PCI clock outputs.
Data pin for I
2
C circuitry 5V tolerant
4
PD#
IN
5
6
7
8
9
10
11
12
13
14
15
16
PCICLK0
PCICLK1
GNDPCI
VDDPCI
PCICLK21
PCICLK3
PCICLK41
GNDPCI
VDDPCI
PCICLK5
PCICLK6
SDATA
24-48MHz/Sel
48_24#*
48MHz
GND48
VDD48
SCLK
OUT
OUT
PWR
PWR
OUT
OUT
OUT
PWR
PWR
OUT
OUT
I/O
17
I/O
Selectable 48 or 24MHz output
18
19
20
21
OUT
PWR
PWR
IN
48MHz output clock
Ground pin.
Power for 24 & 48MHz output buffers and fixed PLL core.
Clock pin of I
2
C circuitry 5V tolerant
Stops all PCICLKs besides the PCICLK_F clocks at logic 0
level, when input low
CPU clock outputs.
Ground pin.
3.3V power for the PLL core.
Stops all CPUCLKs besides the CPUCLK_F clocks at logic 0
level, when input low
14.318 MHz reference clock. Latched input select for strength
of PCICLK(4,2). Default 1X with internal pullup.
3.3V power for the REF.
22
PCI_STOP#
IN
23
24
25
CPUCLK0
GNDCPU/CORE
VDDCPU/CORE
OUT
PWR
PWR
26
CPU_STOP#
IN
27
REF/ 1X or 2X
Programmable*
VDDREF
OUT
28
PWR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS952302 | Frequency Generator for TransmetaTM |
| ICS952302yGLF-T | Frequency Generator for TransmetaTM |
| ICS952601yGLFT | Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor |
| ICS952601 | 16-Bit Buffers/Drivers With 3-State Outputs 48-TVSOP -40 to 85 |
| ICS952601yFLFT | Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS952301YG-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Timing Generator for Transmeta Systems |
| ICS952302 | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator for TransmetaTM |
| ICS952302AG | 功能描述:IC FREQ GENERATOR 48-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952302AGT | 功能描述:IC FREQ GENERATOR 48-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS952302YGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:Frequency Generator for TransmetaTM |
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