參數(shù)資料
型號(hào): IDT2309A-1HPGGI8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 3/8頁(yè)
文件大小: 0K
描述: IC CLK BUFFER ZD HI DRV 16-TSSOP
標(biāo)準(zhǔn)包裝: 4,000
類型: 零延遲緩沖器
PLL: 帶旁路
輸入: LVTTL
輸出: LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 1:9
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 133MHz
除法器/乘法器: 無(wú)/無(wú)
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
其它名稱: 2309A-1HPGGI8
3
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT2309A
3.3VZERODELAYCLOCKBUFFER
DC ELECTRICAL CHARACTERISTICS - COMMERCIAL
Symbol
Parameter
Conditions
Min.
Max.
Unit
VIL
InputLOWVoltageLevel
0.8
V
VIH
Input HIGH Voltage Level
2
V
IIL
InputLOWCurrent
VIN = 0V
50
A
IIH
Input HIGH Current
VIN = VDD
100
A
VOL
OutputLOWVoltage
StandardDrive
IOL = 8mA
0.4
V
High Drive
IOL = 12mA (-1H)
VOH
Output HIGH Voltage
StandardDrive
IOH = -8mA
2.4
V
High Drive
IOH = -12mA (-1H)
IDD_PD
Power Down Current
REF = 0MHz (S2 = S1 = H)
12
A
IDD
SupplyCurrent
Unloaded Outputs at 66.66MHz, SEL inputs at VDD or GND
32
mA
SWITCHING CHARACTERISTICS (2309A-1) - COMMERCIAL(1,2)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
t1
OutputFrequency
10pFLoad
10
133
MHz
30pFLoad
10
100
Duty Cycle = t2
÷ t1
Measured at 1.4V, FOUT = 66.66MHz
40
50
60
%
t3
Rise Time
Measured between 0.8V and 2V
2.5
ns
t4
Fall Time
Measured between 0.8V and 2V
2.5
ns
t5
Output to Output Skew
Alloutputsequallyloaded
250
ps
t6A
Delay, REF Rising Edge to CLKOUT Rising Edge(2) Measured at VDD/2
0
±350
ps
t6B
Delay, REF Rising Edge to CLKOUT Rising Edge(2) Measured at VDD/2 in PLL bypass mode (IDT2309A only)
1
5
8.7
ns
t7
Device-to-Device Skew
Measured at VDD/2 on the CLKOUT pins of devices
0
700
ps
tJ
Cycle-to-Cycle Jitter
Measured at 66.66MHz, loaded outputs
200
ps
tLOCK
PLL Lock Time
Stable power supply, valid clock presented on REF pin
1
ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
Symbol
Parameter
Min.
Max.
Unit
VDD
SupplyVoltage
3
3.6
V
TA
OperatingTemperature(AmbientTemperature)
0
70
°C
CL
Load Capacitance < 100MHz
30
pF
Load Capacitance 100MHz - 133MHz
10
CIN
InputCapacitance
7
pF
OPERATING CONDITIONS - COMMERCIAL
FUNCTION TABLE(1)
S2
S1
CLKA
CLKB
CLKOUT(2)
Output Source
PLL Shut Down
L
Tri-State
Driven
PLL
N
L
H
Driven
Tri-State
Driven
PLL
N
H
L
Driven
REF
Y
H
Driven
PLL
N
NOTES:
1. H = HIGH Voltage Level.
L = LOW Voltage Level
2. This output is driven and has an internal feedback for the PLL. The load on this ouput can be adjusted to change the skew between the REF and the output.
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