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參數資料
| 型號： | IDT54FCT161TPB |
| 廠商： | Integrated Device Technology, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS |
| 中文描述： | 快速CMOS同步預置二進制計數器 |
| 文件頁數： | 6/7頁 |
| 文件大小： | 94K |
| 代理商： | IDT54FCT161TPB |
IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.7
6
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
ENABLE
PROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
V
OH
1.5V
V
OL
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PHZ
3.5V
1.5V
0V
1.5V
DISABLE
V
OH
ETC.
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
2611 lnk 08
2611 drw 04
2611 drw 05
2611 drw 06
2611 drw 07
2611 drw 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
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相關代理商/技術參數 |
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| IDT54FCT161TQ | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS |
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| IDT54FCT161TSO | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS |
| IDT54FCT161TSOB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS |
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