參數(shù)資料
型號(hào): IDT54FCT16501ETPAB
廠商: Integrated Device Technology, Inc.
英文描述: FAST CMOS 18-BIT REGISTERED TRANSCEIVER
中文描述: 快速CMOS 18位注冊(cè)收發(fā)器
文件頁(yè)數(shù): 8/9頁(yè)
文件大小: 140K
代理商: IDT54FCT16501ETPAB
5.10
8
IDT54/74FCT16501AT/CT/ET, 162501AT/CT/ET, 162H501AT/CT/ET
FAST CMOS 18-BIT REGISTERED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
V
OH
1.5V
V
OL
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
2547 drw 07
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
2547 drw 08
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
V
OH
ETC.
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
2547 lnk 11
2547 drw 04
2547 drw 06
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns
2547 drw 05
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IDT54FCT16501ETPF 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:FAST CMOS 18-BIT REGISTERED TRANSCEIVER
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