參數(shù)資料
型號(hào): IDT54FCT16823ATPF
廠商: Integrated Device Technology, Inc.
英文描述: CAP 270PF 50V 5% X7R SMD-1206 TR-7-PL SN-NIBAR
中文描述: 快速CMOS 18位的寄存器
文件頁數(shù): 1/9頁
文件大?。?/td> 157K
代理商: IDT54FCT16823ATPF
Integrated Device Technology, Inc.
DESCRIPTION:
The FCT16823AT/BT/CT/ET and FCT162823AT/BT/CT/
ET 18-bit bus interface registers are built using advanced,
dual metal CMOS technology. These high-speed, low-power
registers with clock enable (x
CLKEN
) and clear (x
CLR
) con-
trols are ideal for parity bus interfacing in high-performance
synchronous systems. The control inputs are organized to
operate the device as two 9-bit registers or one 18-bit register.
Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise mar-
gin.
The FCT16823AT/BT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162823AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times – reduc-
ing the need for external series terminating resistors. The
FCT162823AT/BT/CT/ET are plug-in replacements for the
FCT16823AT/BT/CT/ET and ABT16823 for on-board inter-
face applications.
FAST CMOS 18-BIT
REGISTER
IDT54/74FCT16823AT/BT/CT/ET
IDT54/74FCT162823AT/BT/CT/ET
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for
ABT functions
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
1
μ
A (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40
°
C to +85
°
C
V
CC
= 5V
±
10%
Features for FCT16823AT/BT/CT/ET:
High drive outputs (-32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit “l(fā)ive insertion”
Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25
°
C
Features for FCT162823AT/BT/CT/ET:
Balanced Output Drivers:
±
24mA (commercial),
±
16mA (military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25
°
C
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
2772 drw 01
2772 drw 02
R
C
D
2
OE
2
CLR
2
CLKEN
2
CLK
2
D
1
2
Q
1
TO 8 OTHER CHANNELS
R
C
D
1
OE
1
CLR
1
CLKEN
1
CLK
1
D
1
1
Q
1
TO 8 OTHER CHANNELS
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.16
DSC-2772/8
1
相關(guān)PDF資料
PDF描述
IDT54FCT16823ATPFB CAP 270PF 100V 10% X7R SMD-1206 TR-7-PL SN-NIBAR
IDT54FCT16823ATPV CAP 270PF 50V 10% X7R SMD-1206 TR-7-PL SN-NIBAR
IDT54FCT16823ATPVB FAST CMOS 18-BIT REGISTER
IDT54FCT16823BT FAST CMOS 18-BIT REGISTER
IDT54FCT16823BTE FAST CMOS 18-BIT REGISTER
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