參數(shù)資料
型號(hào)： IDT54FCT521TEB
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 通用總線功能
英文描述： FAST CMOS 8-BIT IDENTITY COMPARATOR
中文描述： FCT SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, CDFP20
封裝： CERPACK-20
文件頁(yè)數(shù)： 4/5頁(yè)
文件大?。?/td> 100K
代理商： IDT54FCT521TEB
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT521T/AT/BT/CT
FAST CMOS 8-BIT IDENTITY COMPARATOR
6.16
4
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
V
OH
1.5V
V
OL
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
V
OH
ETC.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
2572 drw 04
2572 drw 05
2572 drw 06
2572 drw 07
2572 drw 08
2572 lnk 08
相關(guān)PDF資料
PDF描述
IDT74FCT521BTEB FAST CMOS 8-BIT IDENTITY COMPARATOR
IDT74FCT521BTL FAST CMOS 8-BIT IDENTITY COMPARATOR
IDT74FCT521BTLB FAST CMOS 8-BIT IDENTITY COMPARATOR
IDT74FCT521BTP FAST CMOS 8-BIT IDENTITY COMPARATOR
IDT74FCT521BTPB FAST CMOS 8-BIT IDENTITY COMPARATOR
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