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參數(shù)資料
| 型號： | IDT54FCT621TP |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 0.47uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-20%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: X7R; Lead Style: Radial Leaded; Lead Dimensions: 0.200" Lead Spacing; Body Dimensions: 0.300" x 0.390" x 0.200"; Container: Bag; Qty per Container: 250 |
| 中文描述： | 快速CMOS八路總線收發(fā)器（開漏） |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 67K |
| 代理商： | IDT54FCT621TP |
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.18
5
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
V
OH
1.5V
V
OL
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
V
OH
ETC.
ENABLE AND DISABLE TIMES
PROPAGATION DELAY
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L
=
Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
2538 drw 03
2538 drw 04
2538 drw 05
2538 drw 06
2538 drw 07
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
2538 lnk 08
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