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參數(shù)資料
| 型號： | IDT54FCT807BTQB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V, 2 Outputs, LVTTL/LVCMOS to LVPECL Clock Converter with Selectable iInputs |
| 中文描述： | 快速CMOS 1至10時(shí)鐘驅(qū)動器 |
| 文件頁數(shù)： | 6/7頁 |
| 文件大小： | 130K |
| 代理商： | IDT54FCT807BTQB |
IDT54/74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.3
6
TEST WAVEFORMS
PACKAGE DELAY
OUTPUT SKEW- t
SK
(o)
PULSE SKEW - t
SK
(p)
PACKAGE SKEW - t
SK
(t)
ENABLE AND DISABLE TIMES
3017 drw 10
3017 drw 09
3017 drw 11
Package 1 and Package 2 are same device type and speed grade
3017 drw 12
t
PLH1
OUTPUT 1
OUTPUT 2
t
SK(o)
t
PLH2
3V
1.5V
0V
V
OH
1.5V
V
OL
V
OH
1.5V
V
OL
INPUT
t
PHL1
t
PHL2
t
SK(o)
3V
0V
V
OH
1.5V
t
PLH
t
PHL
V
OL
1.5V
t
R
t
F
2.0V
0.8V
INPUT
t
PLH1
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
t
SK(t)
t
PLH2
3V
1.5V
0V
V
OH
1.5V
V
OL
V
OH
1.5V
V
OL
t
PHL1
t
PHL2
t
SK(t)
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
V
OH
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
1.5V
0V
1.5V
ENABLE
DISABLE
t
SK(o)
=
|t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PHL1
|
t
PLH
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
t
SK(p)
=
|t
PHL -
t
PLH
|
t
SK(t)
= |t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PHL1
|
INPUT
OUTPUT
INPUT
OUTPUT
3017 drw 13
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: f
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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