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參數(shù)資料
| 型號： | IDT54FCT88915TT70 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
| 中文描述： | 低歪曲基于PLL的CMOS時鐘驅(qū)動器（具有三態(tài)） |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 140K |
| 代理商： | IDT54FCT88915TT70 |
IDT54/74FCT88915TT 55/70/100/133
LOW SKEW PLL-BASED CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.7
9
CMMU
CMMU
CPU
CMMU
CMMU
CMMU
CMMU
CMMU
CPU
CMMU
CMMU
CMMU
PLL
2f
PLL
2f
CPU
CARD
CPU
CARD
CLOCK
@f
SYSTEM
CLOCK
SOURCE
FCT88915TT
FCT88915TT
DISTRIBUTE
CLOCK @f
CLOCK @2f
at point of use
MEMORY
CONTROL
PLL
2f
MEMORY
CARDS
CLOCK @2f
at point of use
FCT88915TT
3072 drw 10
FCT88915TT System Level Testing Functionality
When the PLL_EN pin is LOW, the PLL is bypassed and the
FCT88915TT is in low frequency "test mode". In test mode
(with FREQ_SEL HIGH), the 2Q output is inverted from the
selected SYNC input, and the Q outputs are divide-by-2
(negative edge triggered) of the SYNC input, and the Q/2
output is divide-by-4 (negative edge triggered). With
FREQ_SEL LOW the 2Q output is divide-by-2 of the SYNC,
the Q outputs divide-by-4, and the Q/2 output divide-by-8.
These relationships can be seen in the block diagram. A
recommended test configuration would be to use SYNC0 or
SYNC1 as the test clock input, and tie PLL_EN and REF_SEL
together and connect them to the test select logic.
This functionality is needed since most board-level testers
run at 1 MHz or below, and theFCT 88915TT cannot lock onto
that low of an input frequency. In the test mode described
above, any test frequency test can be used.
Figure 3. Multiprocessing Application Using the FCT88915TT for Frequency Multiplication
and Low Board-to-Board skew
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT54FCT88915TT70J | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
| IDT54FCT88915TT70JB | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
| IDT54FCT88915TT70L | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
| IDT54FCT88915TT70LB | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
| IDT54FCT88915TT70PY | LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) |
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