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參數(shù)資料
| 型號(hào)： | IDT5T9010BBGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA144 |
| 封裝： | LEAD FREE, PLASTIC, BGA-144 |
| 文件頁數(shù)： | 23/23頁 |
| 文件大小： | 168K |
| 代理商： | IDT5T9010BBGI |
9
INDUSTRIALTEMPERATURERANGE
IDT5T9010
2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER TERACLOCK
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
1V
VX
Differential Input Signal Crossing Point(2)
750
mV
VTHI
Input Timing Measurement Reference Level(3)
Crossing Point
V
tR, tF
Input Signal Edge Rate(4)
1
V/ns
NOTES:
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC)
specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification under
actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR eHSTL(1)
Symbol
Parameter
Test Conditions
Min.
Typ.(7)
Max
Unit
Input Characteristics
IIH
Input HIGH Current
VDD = 2.7V
VI = VDDQ/GND
—
±5
μA
IIL
Input LOW Current
VDD = 2.7V
VI = GND/VDDQ
——
±5
VIK
Clamp Diode Voltage
VDD = 2.3V, IIN = -18mA
—
- 0.7
- 1.2
V
VIN
DC Input Voltage
- 0.3
+3.6
V
VDIF
DC Differential Voltage(2,8)
0.2
—
V
VCM
DC Common Mode Input Voltage(3,8)
800
900
1000
mV
VIH
DC Input HIGH(4,5,8)
VREF + 100
—
mV
VIL
DC Input LOW(4,6,8)
—VREF - 100
mV
VREF
Single-EndedReferenceVoltage(4,8)
—
900
—
mV
Output Characteristics
VOH
Output HIGH Voltage
IOH = -8mA
VDDQ - 0.4
—
V
IOH = -100
μAVDDQ - 0.1
—
V
VOL
Output LOW Voltage
IOL = 8mA
—
0.4
V
IOL = 100
μA
—
0.1
V
VOX
FB/
FB Output Crossing Point
VDDQ/2 - 150
VDDQ/2
VDDQ/2 + 150
mV
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in a differential mode,
REF[1:0]/VREF[1:0] is tied to the DC voltage VREF[1:0].
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at VDD = 2.5V, VDDQ = 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. (See Input/Output Selection table.)
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