參數資料
型號: IDT5T9070PAGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 5T SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝: GREEN, TSSOP-48
文件頁數: 3/7頁
文件大小: 64K
代理商: IDT5T9070PAGI
INDUSTRIALTEMPERATURERANGE
IDT5T9070
2.5VSINGLEDATARATE1:10CLOCKBUFFERTERABUFFERJR.
3
PIN DESCRIPTION
Symbol
I/O
Type
Description
A
I
LVTTL
Clock input
G1
I
LVTTL
Gate for outputs Q1 through Q5. When
G1 is LOW, these outputs are enabled. When G1 is HIGH, these outputs are asynchro-
nously disabled to the level designated by GL(1).
G2
I
LVTTL
Gate for outputs Q6 through Q10. When
G2 is LOW, these outputs are enabled. When G2 is HIGH, these outputs are asynchro-
nously disabled to the level designated by GL(1).
GL
I
LVTTL
Specifies output disable level. If HIGH, the outputs disable HIGH. If LOW, the outputs disable LOW.
Qn
O
LVTTL
Clock outputs
VDD
PWR
Power supply for the device core, inputs, and outputs
GND
PWR
Power supply return for power
NOTE:
1. Because the gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the possibility of runt
pulses or be able to tolerate them in down stream circuitry.
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. Voltage required to maintain a logic HIGH.
3. Voltage required to maintain a logic LOW.
4. Typical values are at VDD = 2.5V, +25°C ambient.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (1)
Symbol
Parameter
Test Conditions
Min.
Typ.(4)
Max
Unit
IIH
Input HIGH Current
VDD = 2.7V
VI = VDD/GND
±5
μA
IIL
Input LOW Current
VDD = 2.7V
VI = GND/VDD
——
±5
VIK
Clamp Diode Voltage
VDD = 2.3V, IIN = -18mA
- 0.7
- 1.2
V
VIN
DC Input Voltage
- 0.3
+3.6
V
VIH
DC Input HIGH(2)
1.7
V
VIL
DC Input LOW(3)
0.7
V
VOH
Output HIGH Voltage
IOH = -12mA
VDD - 0.4
V
IOH = -100
μAVDD - 0.1
V
VOL
Output LOW Voltage
IOL = 12mA
0.4
V
IOL = 100
μA
0.1
V
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