參數(shù)資料
型號(hào): IDT6178S25YB
廠商: Integrated Device Technology, Inc.
英文描述: CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
中文描述: 的CMOS StaticRAM 16K的(4K的× 4位)高速緩存標(biāo)記內(nèi)存
文件頁(yè)數(shù): 2/7頁(yè)
文件大?。?/td> 72K
代理商: IDT6178S25YB
11.1
2
IDT6178S
CMOS StaticRAM 16K (4K x 4-BIT) CACHE-TAG RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
TRUTH TABLES
(1)
WE
OE
CLR
MATCH
Valid
(2)
Invalid
Invalid
Invalid
Mode
H
L
H
X
H
X
L
X
H
H
H
L
Match Cycle
Write Cycle
Read Cycle
Clear Cycle
NOTE:
1. H = V
IH
, L = V
IL
, X = Don’t care.
2. Valid Match = V
OH
, Valid Non-Match = V
OL.
2953 tbl 03
CAPACITANCE
(T
A
= 25
°
C, f = 1MHz)
Symbol
Parameter
C
IN
Input Capacitance
C
I/O
I/O Capacitance
NOTE:
1. This parameter is determined by device characterization, but is not
production tested.
Condition
V
IN
= 0V
V
OUT
= 0V
Max
8
8
Units
pF
pF
2953 tbl 06
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
Rating
Value
Unit
V
Terminal Voltage with respect
to GND
Operating Temperature
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
–0.5 to +7.0
T
A
T
BIAS
T
STG
P
T
I
OUT
–55 to +125
–65 to +135
–65 to +150
1.0
50
°
C
°
C
°
C
W
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliabilty.
2953 tbl 04
RECOMMENDED DC
OPERATING CONDITIONS
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
(2)
–0.5
(1)
Typ.
5.0
0
Max.
5.5
0
6.0
0.8
Unit
V
V
V
V
NOTES:
1. V
IL
= –3.0V for pulse width less than 20ns, once per cycle.
2. V
IH
= 2.5V for clear pin.
2953 tbl 05
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Commercial
Military
Ambient Temperature
0
°
C to +70
°
C
–55
°
C to +125
°
C
GND
0V
0V
V
CC
5.0V
±
10%
5.0V
±
10%
2953 tbl 02
PIN DESCRIPTIONS
A
0
–A
11
Address Inputs
I/O
0
–I/O
3
Data Input/Output
MATCH
Match
WE
Write Enable
OE
Output Enable
CLR
Clear
V
CC
Power
GND
Ground
2953 tbl 01
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
OE
WE
GND
V
CC
A
11
A
10
A
9
A
8
CLR
I/O
3
MATCH
I/O
2
I/O
1
I/O
0
1
22
2
21
3
20
4
19
5
18
6
17
7
16
8
15
9
14
10
13
11
12
P22-1
&
D22-1
2953 drw 02
SOJ
TOP VIEW
NC
A
5
A
0
A
1
A
2
A
3
A
4
A
6
A
7
OE
WE
GND
V
CC
A
11
A
10
A
9
A
8
NC
I/O
3
MATCH
I/O
2
I/O
1
I/O
0
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
S024-4
CLR
12
13
2953 drw 03
DIP
TOP VIEW
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