參數(shù)資料
型號(hào): IDT7015L12GB
廠(chǎng)商: Integrated Device Technology, Inc.
英文描述: HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
中文描述: 高速8K的× 9雙端口靜態(tài)RAM
文件頁(yè)數(shù): 13/20頁(yè)
文件大?。?/td> 263K
代理商: IDT7015L12GB
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.12
13
TIMING WAVEFORM OF READ WITH
BUSY
(M/
S
= V
IH
)
(2,4,5)
2954 drw 13
t
DW
t
APS
ADDR
"A"
t
WC
DATA
OUT "B"
MATCH
t
WP
R/
W
"A"
DATA
IN "A"
ADDR
"B"
t
DH
VALID
(1)
MATCH
BUSY
"B"
t
BDA
VALID
t
BDD
t
DDD(3)
t
WDD
NOTES:
1. To ensure that the earlier of the two ports wins. t
APS
is ignored for M/
S
=V
IL.
2.
CE
L
=
CE
R
= V
IL.
3.
OE
= V
IL
for the reading port.
4. If M/
S
= V
IL
(slave),
BUSY
is an input. Then for this example
BUSY
"A"
= V
IH
and
BUSY
"B"
input is shown above.
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
TIMING WAVEFORM OF WRITE WITH
BUSY
2954 drw 14
R/
W
"A"
BUSY
"B"
t
WP
t
WB
R/
W
"B"
t
WH
( 1 )
(2)
NOTES:
1. t
WH
must be met for both
BUSY
input (SLAVE) and output (MASTER).
2.
BUSY
is asserted on port "B" blocking R/
W
"B", until
BUSY
"B" goes High.
3. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
相關(guān)PDF資料
PDF描述
IDT7015L12J HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015L12JB HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015L12PF HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015L12PFB HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015L15G HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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IDT7015L12J8 功能描述:IC SRAM 72KBIT 12NS 68PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:SRAM - 雙端口,異步 存儲(chǔ)容量:128K(8K x 16) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP(14x14) 包裝:托盤(pán) 其它名稱(chēng):70V25S15PF
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