參數資料
型號： IDT7015S20G
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： DRAM
英文描述： Quad Low-Power JFET-Input General-Purpose Operational Amplifier 14-SOIC 0 to 70
中文描述： 8K X 9 DUAL-PORT SRAM, 20 ns, CPGA68
封裝： CERAMIC, PGA-68
文件頁數： 12/20頁
文件大?。?/td> 263K
代理商： IDT7015S20G
6.12
12
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(6)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT7015X12 IDT7015X15 IDT7015X17
Com'l. Only Com'l. Only Com'l. Only
Min. Max. Min. Max Min Max.
Symbol
BUSY TIMING (M/
S
= V
IH
)
t
BAA
BUSY
Access Time from Address Match
t
BDA
BUSY
Disable Time from Address Not Matched — 12 — 15 — 17
t
BAC
BUSY
Access Time from Chip Enable Low — 12 — 15 — 17
t
BDC
BUSY
Disable Time from Chip Enable High — 12 — 15 — 17
t
APS
Arbitration Priority Set-up Time
(2)
5 — 5 — 5 —
t
BDD
BUSY
Disable to Valid Data
(3)
— 15 — 18 — 18
t
WH
Write Hold After
BUSY
(5)
11 — 13 — 13 —
BUSY TIMING (M/
S
= V
IL
)
t
WB
BUSY
Input to Write
(4)
0 — 0 — 0 —
Write Hold After
BUSY
(5)
11 — 13 — 13 —
PORT-TO-PORT DELAY TIMING
Write Pulse to Data Delay
(1)
— 25 — 30 — 30
Write Data Valid to Read Data Delay
(1)
Parameter
Unit
— 12 — 15 — 17
ns
ns
ns
ns
ns
ns
ns
ns
t
WH
ns
t
WDD
ns
t
DDD
— 20 — 25 — 25
ns
IDT7015X20
IDT7015X25
IDT7015X35
Symbol
BUSY TIMING (M/
S
= V
IH
)
t
BAA
BUSY
Access Time from Address Match
t
BDA
BUSY
Disable Time from Address Not Matched
t
BAC
BUSY
Access Time from Chip Enable Low
t
BDC
BUSY
Disable Time from Chip Enable High
t
APS
Arbitration Priority Set-up Time
(2)
BUSY
Disable to Valid Data
(3)
t
WH
Write Hold After
BUSY
(5)
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
—
—
—
—
5
20
20
20
17
—
—
—
—
—
5
20
20
20
17
—
—
—
—
—
5
20
20
20
20
—
ns
ns
ns
ns
ns
t
BDD
—
15
30
—
—
17
30
—
—
25
35
—
ns
ns
BUSY TIMING (M/
S
= V
IL
)
BUSY
Input to Write
(4)
Write Hold After
BUSY
(5)
t
WB
0
—
0
—
0
—
ns
t
WH
15
—
17
—
25
—
ns
PORT-TO-PORT DELAY TIMING
Write Pulse to Data Delay
(1)
Write Data Valid to Read Data Delay
(1)
t
WDD
—
45
—
50
—
60
ns
t
DDD
—
30
—
35
—
45
ns
NOTES:
1. Port-to-port delay through RAM cells from writing port to reading port, refer to "Timing Wave form of Write with Port-to-Port Read and
BUSY
(M/
S
= V
IH
)".
2. To ensure that the earlier of the two ports wins.
3. t
BDD
is a calculated parameter and is the greater of 0, t
WDD
– t
WP
(actual), or t
DDD
– t
DW
(actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. "X" in part numbers indicates power rating (S or L).
2940 tbl 13
相關PDF資料
PDF描述
IDT7015S20GB Quad Low-Power JFET-Input General-Purpose Operational Amplifier 14-SSOP 0 to 70
IDT7015S20J Quad Low-Power JFET-Input General-Purpose Operational Amplifier 14-SSOP 0 to 70
IDT7015S20JB HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S20PF Quad Low-Power JFET-Input General-Purpose Operational Amplifier 14-SOIC 0 to 70
IDT7015S20PFB HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
相關代理商/技術參數
參數描述
IDT7015S20GB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S20GI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
IDT7015S20J 功能描述:IC SRAM 72KBIT 20NS 68PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，異步 存儲容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應商設備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF
IDT7015S20J8 功能描述:IC SRAM 72KBIT 20NS 68PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:72 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步 存儲容量:9M（256K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LQFP 供應商設備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:71V67703S75PFGI
IDT7015S20JB 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
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