參數(shù)資料
型號(hào): IDT7015S35JB
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: LED/TAPE AND REEL OR BULK//YELLOW RIGHT ANGLE
中文描述: 8K X 9 DUAL-PORT SRAM, 35 ns, PQCC68
封裝: PLASTIC, LCC-68
文件頁(yè)數(shù): 6/20頁(yè)
文件大?。?/td> 263K
代理商: IDT7015S35JB
6.12
6
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(1)
(Cont'd)
(V
CC
= 5.0V
±
10%)
7015X20
7015X25
7015X35
Test
Symbol
I
CC
Parameter
Condition
Version
MIL.
Typ.
(2)
160
160
20
20
95
95
1.0
0.2
Max.
290
240
60
50
180
150
15
5
Typ.
(2)
155
155
155
155
16
16
16
16
90
90
90
90
1.0
0.2
1.0
0.2
Max. Typ.
(2)
340
280
265
220
80
65
60
50
215
180
170
140
30
10
15
5
Max. Unit
300
250
250
210
80
65
60
50
190
160
155
130
30
10
15
5
Dynamic Operating
Current
(Both Ports Active)
CE
= V
IL
, Outputs Open
SEM
= V
IH
f = f
MAX(3)
S
L
S
L
S
L
S
L
S
L
S
L
S
L
S
L
150
150
150
150
13
13
13
13
85
85
85
85
1.0
0.2
1.0
0.2
mA
COM’L.
I
SB1
Standby Current
(Both Ports — TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
SEM
R
=
SEM
L
= V
IH
f = f
MAX(3)
MIL.
mA
COM’L.
I
SB2
Standby Current
(One Port — TTL
Level Inputs)
CE
"A"
=V
IL
and
CE
"B"
=V
IH(5)
MIL.
Active Port Outputs Open
f = f
MAX(3)
SEM
R
=
SEM
L
= V
IH
Both Ports
CE
L
and
CE
R
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(4)
SEM
R
=
SEM
L
> V
CC
- 0.2V
CE
"A"
<
0.2V and
CE
"B"
> V
CC
- 0.2V
(5)
SEM
R
=
SEM
L
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V
Active Port Outputs Open,
f = f
MAX(3)
mA
COM’L.
I
SB3
Full Standby Current
(Both Ports — All
CMOS Level Inputs)
MIL.
mA
COM’L.
I
SB4
Full Standby Current
(One Port — All
CMOS Level Inputs)
MIL.
S
L
85
85
200
170
80
80
175
150
mA
COM’L.
S
L
90
90
155
130
85
85
145
120
80
80
135
110
NOTES:
1. "X" in part numbers indicates power rating (S or L).
2. V
CC
= 5V, T
A
= +25
°
C, and are not production tested. I
CCDC
= 120mA(typ.)
3. At f = f
,
address and I/O'
are cycling at the maximum frequency read cycle of 1/ t
RC
, and using
“AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite of port "A".
2954 tbl 10
OUTPUT LOADS AND AC TEST
CONDITIONS
Input Pulse Levels GND to 3.0V
Input Rise/Fall Times
(1)
5ns Max.
Input Timing Reference Levels 1.5V
Output Reference Levels 1.5V
Output Load Figure 1 and 2
2954 drw 06
893
30pF
347
5V
DATA
OUT
BUSY
INT
893
5pF
347
5V
DATA
OUT
*
2954 drw 05
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(For t
LZ
, t
HZ
, t
WZ
, t
OW
)
Including scope and jig.
NOTE:
1. 3ns Max. for t
AA
=12ns
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