參數(shù)資料
型號: IDT7016S15PFGI
廠商: Integrated Device Technology, Inc.
英文描述: HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM
中文描述: 高速16K的× 9雙端口靜態(tài)RAM
文件頁數(shù): 13/20頁
文件大?。?/td> 173K
代理商: IDT7016S15PFGI
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
Timing Waveform of Read with
BUSY
(2,4,5)
(M/
S
= V
IH
)
13
APRIL 04, 2006
3190 drw 13
t
DW
t
APS
ADDR
"A"
t
WC
DATA
OUT "B"
MATCH
t
WP
R/
W
"A"
DATA
IN "A"
ADDR
"B"
t
DH
VALID
(1)
MATCH
BUSY
"B"
t
BDA
VALID
t
BDD
t
DDD
(3)
t
WDD
T iming Waveform of Write with
BUSY
(3)
NOTES:
1. t
WH
must be met for both
BUSY
input (SLAVE) and output (MASTER).
2.
BUSY
is asserted on port "B" blocking R/
W
"B"
, until
BUSY
"B"
goes HIGH.
3. All timng is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite fromPort "A".
NOTES:
1. To ensure that the earlier of the two ports wins. t
APS
is ignored for M/
S
=V
IL
.
2.
CE
L
=
CE
R
= V
IL
.
3.
OE
= V
IL
for the reading port.
4. If M/
S
=V
IL
(SLAVE),
BUSY
is an input. Then for this example
BUSY
“A”
= V
IH
and
BUSY
“B”
input is shown above.
5. All timng is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite fromPort "A".
3190 drw 14
R/
W
"A"
BUSY
"B"
t
WP
t
WB
R/
W
"B"
t
WH
(1)
(2)
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