參數(shù)資料
型號(hào): IDT7024L17G
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi): DRAM
英文描述: Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
中文描述: 4K X 16 DUAL-PORT SRAM, 17 ns, CPGA84
封裝: CERAMIC, PGA-84
文件頁(yè)數(shù): 1/20頁(yè)
文件大?。?/td> 292K
代理商: IDT7024L17G
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1996
1996 Integrated Device Technology, Inc.
DSC-2740/6
IDT7024S/L
HIGH-SPEED
4K x 16 DUAL-PORT
STATIC RAM
more than one device
M/
S
= H for
BUSY
output flag on Master
M/
S
= L for
BUSY
input on Slave
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Devices are capable of withstanding greater than 2001V
electrostatic discharge.
Fully asynchronous operation from either port
Battery backup operation—2V data retention
TTL-compatible, single 5V (
±
10%) power supply
Available in 84-pin PGA, 84-pin quad flatpack, 84-pin
PLCC, and 100-pin Thin Quad Plastic Flatpack
Industrial temperature range (–40
°
C to +85
°
C) is avail-
able, tested to military electrical specifications
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
High-speed access
— Military: 20/25/35/55/70ns (max.)
— Commercial: 15/17/20/25/35/55ns (max.)
Low-power operation
— IDT7024S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT7024L
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for
multiplexed bus compatibility
IDT7024 easily expands data bus width to 32 bits or
more using the Master/Slave select when cascading
NOTES:
1. (MASTER):
BUSY
is output;
(SLAVE):
BUSY
is input.
2.
BUSY
outputs
and
INT
outputs
are non-tri-stated
push-pull.
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
6.15
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
I/O
Control
R/
W
L
UB
L
BUSY
L
A
11L
A
0L
2740 drw 01
LB
L
CE
L
OE
L
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
CE
L
OE
L
R/
W
L
SEM
L
INT
L
M/
S
R/
W
R
UB
R
BUSY
R
LB
R
CE
R
OE
R
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
A
11R
A
0R
R/
W
R
SEM
R
INT
R
CE
R
OE
R
(2)
(1,2)
(1,2)
(2)
12
12
相關(guān)PDF資料
PDF描述
IDT7024L17GB Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
IDT7024L17J Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
IDT7024L17PF Low-Noise JFET-Input Operational Amplifier 8-PDIP 0 to 70
IDT7024L25F Low-Noise JFET-Input Operational Amplifier 8-PDIP 0 to 70
IDT7024L25FB Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
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