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參數(shù)資料
| 型號： | IDT7024S55PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM |
| 中文描述： | 4K X 16 DUAL-PORT SRAM, 55 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 292K |
| 代理商： | IDT7024S55PF |
IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.15
9
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
(5)
IDT7024X15
Com'l. Only
Min.
IDT7024X17
Com'l. Only
Min.
IDT7024X20
IDT7024X25
Symbol
WRITE CYCLE
t
WC
t
EW
t
AW
t
AS
t
WP
t
WR
t
DW
t
HZ
t
DH
t
WZ
t
OW
t
SWRD
t
SPS
Parameter
Max.
Max.
Min.
Max.
Min.
Max.
Unit
Write Cycle Time
Chip Enable to End-of-Write
(3)
Address Valid to End-of-Write
Address Set-up Time
(3)
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time
(1, 2)
Data Hold Time
(4)
Write Enable to Output in High-Z
(1, 2)
Output Active from End-of-Write
(1, 2, 4)
SEM
Flag Write to Read Time
SEM
Flag Contention Window
15
12
12
0
12
0
10
—
0
—
0
5
5
—
—
—
—
—
—
—
10
—
10
—
—
—
17
12
12
0
12
0
10
—
0
—
0
5
5
—
—
—
—
—
—
—
10
—
10
—
—
—
20
15
15
0
15
0
15
—
0
—
0
5
5
—
—
—
—
—
—
—
12
—
12
—
—
—
25
20
20
0
20
0
15
—
0
—
0
5
5
—
—
—
—
—
—
—
15
—
15
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IDT7024X35
IDT7024X55
IDT7024X70
Mil. Only
Min.
Symbol
WRITE CYCLE
t
WC
t
EW
t
AW
t
AS
t
WP
t
WR
t
DW
Parameter
Min.
Max.
Min.
Max.
Max.
Unit
Write Cycle Time
Chip Enable to End-of-Write
(3)
Address Valid to End-of-Write
Address Set-up Time
(3)
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time
(1, 2)
Data Hold Time
(4)
Write Enable to Output in High-Z
(1, 2)
Output Active from End-of-Write
(1, 2, 4)
35
30
30
0
25
0
15
—
—
—
—
—
—
—
55
45
45
0
40
0
30
—
—
—
—
—
—
—
70
50
50
0
50
0
40
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
t
HZ
—
15
—
25
—
30
ns
t
DH
t
WZ
0
—
—
15
0
—
—
25
0
—
—
30
ns
ns
t
OW
0
—
0
—
0
—
ns
t
SWRD
t
SPS
SEM
Flag Write to Read Time
SEM
Flag Contention Window
5
5
—
—
5
5
—
—
5
5
—
—
ns
ns
NOTES:
1. Transition is measured
±
500mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM,
CE
= V
IL
,
UB
or
LB
= V
IL
,
SEM
= V
IH
. To access semaphore,
CE
= V
IH
or
UB
&
LB
= V
IH
, and
SEM
= V
IL
. Either condition must be valid
for the entire t
EW
time.
4. The specification for t
DH
must be met by the device supplying write data to the RAM under all operating conditions. Although t
DH
and t
OW
values will vary
over voltage and temperature, the actual t
DH
will always be smaller than the actual t
OW
.
5. "X" in part numbers indicates power rating (S or L).
2740 tbl 14
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