參數(shù)資料
型號: IDT70261S20PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
中文描述: 16K X 16 DUAL-PORT SRAM, 20 ns, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁數(shù): 18/19頁
文件大小: 171K
代理商: IDT70261S20PF
6.42
IDT70261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt Industrial and Commercial Temperature Ranges
18
of the resource after the left processor, it would read back a one in response
to the zero it had attempted to write into Semaphore 0. At this point, the
software could choose to try and gain control of the second 8K section by
writing, then reading a zero into Semaphore 1. If it succeeded in gaining
control, it would lock out the left side.
Once the left side was finished with its task, it would write a one to
Semaphore 0 and may then try to gain access to Semaphore 1. If
Semaphore 1 was still occupied by the right side, the left side could undo
its semaphore request and performother tasks until it was able to write, then
read a zero into Semaphore 1. If the right processor performs a simlar task
with Semaphore 0, this protocol would allow the two processors to swap
8K blocks of Dual-Port RAMwith each other.
The blocks do not have to be any particular size and can even be
variable, depending upon the complexity of the software using the
semaphore flags. All eight semaphores could be used to divide the Dual-
Port RAMor other shared resources into eight parts. Semaphores can
even be assigned different meanings on different sides rather than being
given a common meaning as was shown in the example above.
Semaphores are a useful formof arbitration in systems like disk
interfaces where the CPU must be locked out of a section of memory during
a transfer and the I/O device cannot tolerate any wait states. With the use
of semaphores, once the two devices has determned which memory area
was
off-limts
to the CPU, both the CPU and the I/O devices could access
their assigned portions of memory continuously without any wait states.
Semaphores are also useful in applications where no memory
WAIT
state is available on one or both sides. Once a semaphore handshake has
been performed, both processors can access their assigned RAM
segments at full speed.
Another application is in the area of complex data structures. In this
case, block arbitration is very important. For this application one processor
may be responsible for building and updating a data structure. The other
processor then reads and interprets that data structure. If the interpreting
processor reads an incomplete data structure, a major error condition may
exist. Therefore, some sort of arbitration must be used between the two
different processors. The building processor arbitrates for the block, locks
it and then is able to go in and update the data structure. When the update
is completed, the data structure block is released. This allows the
interpreting processor to come back and read the complete data structure,
thereby guaranteeing a consistent data structure.
相關(guān)PDF資料
PDF描述
IDT70261S20PFI HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
IDT70261S25PF HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
IDT70261S25PFI HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
IDT70261S35PF HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
IDT70261S35PFI HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
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IDT70261S25PFI 功能描述:IC SRAM 256KBIT 25NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口,同步 存儲容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70261S25PFI8 功能描述:IC SRAM 256KBIT 25NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口,異步 存儲容量:128K(8K x 16) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP(14x14) 包裝:托盤 其它名稱:70V25S15PF