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參數(shù)資料
| 型號： | IDT7026L20JB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM |
| 中文描述： | 16K X 16 DUAL-PORT SRAM, 20 ns, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 239K |
| 代理商： | IDT7026L20JB |
6.17
12
IDT7026S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BUSY TIMING (M/
S
= V
IL
)
t
WB
BUSY
Input to Write
(4)
t
WH
Write Hold After
BUSY
(5)
PORT-TO-PORT DELAY TIMING
t
WDD
Write Pulse to Data Delay
(1)
t
DDD
Write Data Valid to Read Data Delay
(1)
NOTES:
1. Port-to-port delay through RAM cells from writing port to reading port, refer to "Timing Waveform of Write with Port-to-Port Read and
BUSY
(M/
S
= V
IH
)".
2. To ensure that the earlier of the two ports wins.
3. t
BDD
is a calculated parameter and is the greater of 0, t
WDD
– t
WP
(actual), or t
DDD
– t
DW
(actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. "X" in part numbers indicates power rating (S or L).
0
25
—
—
0
25
—
—
ns
ns
—
—
60
45
—
—
80
65
ns
ns
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(6)
IDT7026X20
Com'l. Only
Min.
IDT7026X25
Symbol
BUSY TIMING (M/
S
= V
IH
)
t
BAA
BUSY
Access Time from Address Match
t
BDA
BUSY
Disable Time from Address Not Matched
t
BAC
BUSY
Access Time from Chip Enable Low
t
BDC
BUSY
Disable Time from Chip Enable High
t
APS
Arbitration Priority Set-up Time
(2)
t
BDD
BUSY
Disable to Valid Data
(3)
t
WH
Write Hold After
BUSY
(5)
BUSY TIMING (M/
S
= V
IL
)
t
WB
BUSY
Input to Write
(4)
t
WH
Write Hold After
BUSY
(5)
PORT-TO-PORT DELAY TIMING
t
WDD
Write Pulse to Data Delay
(1)
t
DDD
Write Data Valid to Read Data Delay
(1)
Parameter
Max.
Min.
Max.
Unit
—
—
—
—
5
—
15
20
20
20
17
—
30
—
—
—
—
—
5
—
17
20
20
20
17
—
30
—
ns
ns
ns
ns
ns
ns
ns
0
15
—
—
0
17
—
—
ns
ns
—
—
45
30
—
—
50
35
ns
ns
IDT7026X35
IDT7026X55
Symbol
BUSY TIMING (M/
S
= V
IH
)
t
BAA
BUSY
Access Time from Address Match
t
BDA
BUSY
Disable Time from Address Not Matched
t
BAC
BUSY
Access Time from Chip Enable Low
t
BDC
BUSY
Disable Time from Chip Enable High
t
APS
Arbitration Priority Set-up Time
(2)
t
BDD
BUSY
Disable to Valid Data
(3)
t
WH
Write Hold After
BUSY
(5)
Parameter
Min.
Max.
Min.
Max.
Unit
—
—
—
—
5
—
25
20
20
20
20
—
35
—
—
—
—
—
5
—
25
45
40
40
35
—
40
—
ns
ns
ns
ns
ns
ns
ns
2939 tbl 15
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| IDT7026L25G | HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM |
| IDT7026L25GB | HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM |
| IDT7026L25J | HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM |
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| IDT7026L20JI | 功能描述:IC SRAM 256KBIT 20NS 84PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，同步 存儲容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
| IDT7026L20JI8 | 功能描述:IC SRAM 256KBIT 20NS 84PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，同步 存儲容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
| IDT7026L25G | 功能描述:IC SRAM 256KBIT 25NS 84PGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR) |
| IDT7026L25GB | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 256KBIT 25NS 84PGA |
| IDT7026L25J | 功能描述:IC SRAM 256KBIT 25NS 84PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，同步 存儲容量:1.125M（32K x 36） 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA（17x17） 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8 |
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