參數(shù)資料
型號: IDT70V3389S5BC
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
中文描述: 64K X 18 DUAL-PORT SRAM, 5 ns, PBGA256
封裝: BGA-256
文件頁數(shù): 8/17頁
文件大?。?/td> 176K
代理商: IDT70V3389S5BC
6.42
IDT70V3389S
High-Speed 64K x 18 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges
-'/8'/
&*012
!#
2
9!%!2:72#
NOTES:
1. At f = f
MAX
, address and control lines (except Output Enable) are cycling at the maximumfrequency clock cycle of 1/t
CYC
, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite fromport "A".
4. V
DD
= 3.3V, T
A
= 25
°
C for Typ, and are not production tested. I
DD DC
(f=0)
= 120mA (Typ).
5.
CE
X
= V
IL
means
CE
0X
= V
IL
and CE
1X
= V
IH
CE
X
= V
IH
means
CE
0X
= V
IH
or CE
1X
= V
IL
CE
X
< 0.2V means
CE
0X
< 0.2V and CE
1X
> V
CC
- 0.2V
CE
X
> V
CC
- 0.2V means
CE
0X
> V
CC
- 0.2V or CE
1X
- 0.2V
"X" represents "L" for left port or "R" for right port.
70V3389S4
Com'l Only
70V3389S5
Com'l
& Ind
70V3389S6
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.
(4)
Max.
Typ.
(4)
Max.
Typ.
(4)
Max.
Unit
I
DD
Dynamic Operating
Current (Both
Ports Active)
CE
L
and
CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L
S
375
460
285
360
245
310
mA
IND
S
____
____
285
415
245
360
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
f = f
MAX
(1)
COM'L
S
145
190
105
145
95
125
mA
IND
S
____
____
105
175
95
150
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
COM'L
S
265
325
190
260
175
225
mA
IND
S
____
____
190
300
175
260
I
SB3
Full Standby Current
(Both Ports - CMOS
Level Inputs)
Both Ports
CE
L
and
CE
R
> V
DD
- 0.2V, V
IN
> V
DD
- 0.2V
or V
IN
< 0.2V, f = 0
(2)
COM'L
S
6
15
6
15
6
15
mA
IND
S
____
____
6
30
6
30
I
SB4
Full Standby Current
(One Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DD
- 0.2V
(5)
V
IN
> V
DD
- 0.2V or V
IN
< 0.2V, Active
Port, Outputs Disabled, f = f
MAX
(1)
COM'L
S
265
325
180
260
170
225
mA
IND
S
____
____
180
300
170
260
4832 tbl 09
相關(guān)PDF資料
PDF描述
IDT70V3389S5BCI HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3389S5BF HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3389S5BFI HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3389S5PRF HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3389S5PRFI HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
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