參數(shù)資料
型號(hào): IDT70V3569S5DRI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
中文描述: 16K X 36 DUAL-PORT SRAM, 5 ns, PQFP208
封裝: PLASTIC, QFP-208
文件頁數(shù): 15/16頁
文件大小: 198K
代理商: IDT70V3569S5DRI
6.42
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges
The IDT70V3569 provides a true synchronous Dual-Port Static RAM
interface. Registered inputs provide mnimal set-up and hold times on
address, data, and all critical control inputs. All internal registers are clocked
on the rising edge of the clock signal, however, the self-timed internal write
pulse is independent of the LOW to HIGH transition of the clock signal.
An asynchronous output enable is provided to ease asyn-
chronous bus interfacing. Counter enable inputs are also provided to stall
the operation of the address counters for fast interleaved
memory applications.
A HIGH on
CE
0
or a LOW on CE
1
for one clock cycle will power down
the internal circuitry to reduce static power consumption. Multiple chip
enables allow easier banking of multiple IDT70V3569s for depth expan-
sion configurations. Two cycles are required with
CE
0
LOW and CE
1
HIGH to re-activate the outputs.
4831 drw 14
IDT70V3569
CE
0
CE
1
CE
1
CE
0
CE
0
CE
1
A
15
CE
1
CE
0
V
DD
V
DD
IDT70V3569
IDT70V3569
IDT70V3569
Control Inputs
Control Inputs
Control Inputs
Control Inputs
BE
,
R/
W
,
OE
,
CLK,
ADS
,
CNTRST
,
CNTEN
'*,*'-7
The IDT70V3569 features dual chip enables (refer to Truth
Table I) in order to facilitate rapid and simple depth expansion with no
requirements for external logic. Figure 4 illustrates how to control the
various chip enables in order to expand two devices in depth.
The IDT70V3569 can also be used in applications requiring expanded
width, as indicated in Figure 4. Through combining the control signals, the
devices can be grouped as necessary to accommodate applications
needing 72-bits or wider.
Figure 4. Depth and Width Expansion with IDT70V3569
相關(guān)PDF資料
PDF描述
IDT70V3569S6BC HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3569S6BCI HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3569S6BF HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3569S6BFI HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3569S6DR HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT70V3569S6BAI 制造商:Integrated Device Technology Inc 功能描述:
IDT70V3569S6BC 功能描述:IC SRAM 576KBIT 6NS 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70V3569S6BC8 功能描述:IC SRAM 576KBIT 6NS 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70V3569S6BF 功能描述:IC SRAM 576KBIT 6NS 208FBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70V3569S6BF8 功能描述:IC SRAM 576KBIT 6NS 208FBGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8