參數(shù)資料
型號(hào): IDT70V7599S200BC
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
中文描述: 128K X 36 DUAL-PORT SRAM, 10 ns, PBGA256
封裝: 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, BGA-256
文件頁(yè)數(shù): 12/22頁(yè)
文件大?。?/td> 489K
代理商: IDT70V7599S200BC
6.42
IDT70V7599S
High-Speed 128K x 36 Synchronous Bank-Switchable Dual-Port Static RAM Industrial and Commercial Temperature Ranges
Timing Waveform of Read Cycle for Pipelined Operation
(
ADS
Operation) (
FT
/PIPE
'X'
= V
IH
)
(2)
An
An + 1
An + 2
An + 3
t
CYC2
t
CH2
t
CL2
R/
W
ADDRESS
CE
0
CLK
CE
1
BE
n
(3)
DATA
OUT
OE
t
CD2
t
CKLZ
Qn
Qn + 1
Qn + 2
t
OHZ
t
OLZ
t
OE
5626 drw 06
(1)
(1)
t
SC
t
HC
t
SB
t
HB
t
SW
t
SA
t
HW
t
HA
t
DC
t
SC
t
HC
t
SB
(5)
t
HB
(4)
(1 Latency)
(5)
NOTES:
1.
OE
is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
2.
ADS
= V
IL
,
CNTEN
and
REPEAT
= V
IH
.
3. The output is disabled (High-Impedance state) by
CE
0
= V
IH
, CE
1
= V
IL
,
BE
n
= V
IH
following the next rising edge of the clock. Refer to
Truth Table 1.
4. Addresses do not have to be accessed sequentially since
ADS
= V
IL
constantly loads the address on the rising edge of the CLK; numbers
are for reference use only.
5. If
BE
n
was HIGH, then the appropriate Byte of DATA
OUT
for Qn + 2 would be disabled (High-Impedance state).
6. "x" denotes Left or Right port. The diagramis with respect to that port.
Timing Waveform of Read Cycle for Flow-through Output
(
FT
/PIPE
"X"
= V
IL
)
(2,6)
t
CYC1
An
An + 1
An + 2
An + 3
t
CH1
t
CL1
R/
W
ADDRESS
DATA
OUT
CE
0
CLK
OE
t
SC
t
HC
t
CD1
t
CKLZ
Qn
Qn + 1
Qn + 2
t
OHZ
t
OLZ
t
OE
t
CKHZ
5626 drw 07
(5)
(1)
CE
1
BE
n
(3)
t
SB
t
HB
t
SW
t
HW
t
SA
t
HA
t
DC
t
DC
(4)
t
SC
t
HC
t
SB
(5)
t
HB
相關(guān)PDF資料
PDF描述
IDT70V7599S200BCI HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V7599S200BF HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V7599S HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V7599S133BC HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V7599S133BCI High Conductance Low Leakage Diode; Package: DO-35; No of Pins: 2; Container: Bulk
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT70V7599S200BC8 功能描述:IC SRAM 4MBIT 200MHZ 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:8K (1K x 8) 速度:400kHz 接口:I²C,2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR)
IDT70V9079L12PF 功能描述:IC SRAM 256KBIT 12NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70V9079L12PF8 功能描述:IC SRAM 256KBIT 12NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,異步 存儲(chǔ)容量:128K(8K x 16) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP(14x14) 包裝:托盤 其它名稱:70V25S15PF
IDT70V9079L12PFI 功能描述:IC SRAM 256KBIT 12NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,同步 存儲(chǔ)容量:1.125M(32K x 36) 速度:5ns 接口:并聯(lián) 電源電壓:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 85°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-CABGA(17x17) 包裝:帶卷 (TR) 其它名稱:70V3579S5BCI8
IDT70V9079L12PFI8 功能描述:IC SRAM 256KBIT 12NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:45 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 雙端口,異步 存儲(chǔ)容量:128K(8K x 16) 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP(14x14) 包裝:托盤 其它名稱:70V25S15PF