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參數(shù)資料
| 型號： | IDT70V9279L6PRFI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM |
| 中文描述： | 高速3.3 32K的× 16 SYNCHRONOU S雙，端口靜態(tài)內(nèi)存 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 337K |
| 代理商： | IDT70V9279L6PRFI |
6.42
IDT70V9279/69S/L
High-Speed 32/16K x 16 Dual-Port Synchronous Static RAM Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(3,6)
(V
DD
= 3.3V ± 0.3V)(Cont'd)
NOTES:
1. At f = f
MAX
, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/t
CYC
, using "AC TEST CONDITIONS" at input
levels of V
SS
to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD
= 3.3V, T
A
= 25°C for Typ, and are not production tested. I
DD DC
(f=0)
= 90mA (Typ).
5.
CE
X
= V
IL
means
CE
0X
= V
IL
and CE
1X
= V
IH
CE
X
= V
IH
means
CE
0X
= V
IH
or CE
1X
= V
IL
CE
X
< 0.2V means
CE
0X
< 0.2V and CE
1X
> V
DD
- 0.2V
CE
X
> V
DD
- 0.2V means
CE
0X
> V
DD
- 0.2V or CE
1X
< 0.2V
'X' represents "L" for left port or "R" for right port.
6. 'X' in part numbers indicate power rating (S or L).
70V9279/69X12
Com'l Only
70V9279/69X15
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ.
(4)
Max.
Typ.
(4)
Max.
Unit
I
DD
Dynamic
Operating
Current (Both
Ports Active)
CE
L
and
CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L
S
L
150
150
240
205
130
130
220
185
mA
IND
S
L
____
____
____
____
____
____
____
____
I
SB1
Standby
Current (Both
Ports - TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
f = f
MAX
(1)
COM'L
S
L
40
40
65
50
30
30
55
35
mA
IND
S
L
____
____
____
____
____
____
____
____
I
SB2
Standby
Current (One
Port - TTL
Level Inputs)
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
COM'L
S
L
100
100
160
140
90
90
150
130
mA
IND
S
L
____
____
____
____
____
____
____
____
I
SB3
Full Standby
Current (Both
Ports - CMOS
Level Inputs)
Both Ports
CE
L
and
CE
R
> V
DD
- 0.2V,
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, f = 0
(2)
COM'L
S
L
1.0
0.4
5
3
1.0
0.4
5
3
mA
IND
S
L
____
____
____
____
____
____
____
____
I
SB4
Full Standby
Current (One
Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DD
- 0.2V
(5)
V
IN
> V
DD
- 0.2V or
V
IN
< 0.2V, Active Port,
Outputs Disabled, f = f
MAX
(1)
COM'L
S
L
90
90
150
130
80
80
140
120
mA
IND
S
L
____
____
____
____
____
____
____
____
3743 tbl 09b
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